| Patent | Date |
|---|
Method and apparatus for enabling mobile cluster computing
Grant 10,212,254 - Mahalingaiah Feb | 2019-02-19 |
Method and apparatus for enabling mobile cluster computing
Grant 9,467,494 - Mahalingaiah October 11, 2 | 2016-10-11 |
Method and apparatus for securing digital devices while reducing power consumption
Grant 8,769,331 - Mahalingaiah July 1, 2 | 2014-07-01 |
Method and apparatus for providing continuous user verification in a packet-based network
Grant 8,683,572 - Mahalingaiah March 25, 2 | 2014-03-25 |
Method and apparatus for securing communication over public network
Grant 8,458,453 - Mahalingaiah June 4, 2 | 2013-06-04 |
Method And Apparatus For Securing Digital Devices With Locking Clock Mechanism
App 20110302660 - Mahalingaiah; Rupaka | 2011-12-08 |
Apparatus, system, and method for routing data to and from a host that is moved from one location on a communication system to another location on the communication system
Grant 7,970,929 - Mahalingaiah June 28, 2 | 2011-06-28 |
Network packet transmission mechanism
Grant 7,778,259 - Mahalingaiah August 17, 2 | 2010-08-17 |
Communication network and protocol which can efficiently maintain transmission across a disrupted network
Grant 6,912,196 - Mahalingaiah June 28, 2 | 2005-06-28 |
Address mapping mechanism enabling multi-domain addressing in communication networks
Grant 6,804,235 - Mahalingaiah October 12, 2 | 2004-10-12 |
Communication network having modular switches that enhance data throughput
Grant 6,788,701 - Mahalingaiah , et al. September 7, 2 | 2004-09-07 |
Communication network having packetized security codes and a system for detecting security breach locations within the network
Grant 6,754,214 - Mahalingaiah June 22, 2 | 2004-06-22 |
Communication network across which packets of data are transmitted according to a priority scheme
Grant 6,654,346 - Mahalingaiah , et al. November 25, 2 | 2003-11-25 |
Modular switches interconnected across a communication network to achieve minimal address mapping or translation between termination devices
Grant 6,643,286 - Kapadia , et al. November 4, 2 | 2003-11-04 |
Address mapping mechanism enabling multi-domain addressing in communication networks
App 20030133451 - Mahalingaiah, Rupaka | 2003-07-17 |
Load/store Unit With Fast Memory Data Access Mechanism
App 20030074530 - MAHALINGAIAH, RUPAKA ; et al. | 2003-04-17 |
Address mapping mechanism enabling multi-domain addressing in communication networks
App 20020114326 - Mahalingaiah, Rupaka | 2002-08-22 |
Predecoding multiple instructions as one combined instruction and detecting branch to one of the instructions
Grant 6,360,317 - Mahalingaiah , et al. March 19, 2 | 2002-03-19 |
Superscalar microprocessor configured to predict return addresses from a return stack storage
Grant 6,269,436 - Tran , et al. July 31, 2 | 2001-07-31 |
Forcing regularity into a CISC instruction set by padding instructions
Grant 6,253,309 - Mahalingaiah June 26, 2 | 2001-06-26 |
Apparatus and method for microcode patching for generating a next address
Grant 6,141,740 - Mahalingaiah , et al. Oc | 2000-10-31 |
Method and apparatus for generation and synchronization of distributed pulse clocked mechanism digital designs
Grant 6,134,670 - Mahalingaiah October 17, 2 | 2000-10-17 |
Apparatus and method for tracing microprocessor instructions
Grant 6,106,573 - Mahalingaiah , et al. August 22, 2 | 2000-08-22 |
Using ECC/parity bits to store predecode information
Grant 6,092,182 - Mahalingaiah July 18, 2 | 2000-07-18 |
Method for detecting updates to instructions which are within an instruction processing pipeline of a microprocessor
Grant 6,073,217 - Mahalingaiah , et al. June 6, 2 | 2000-06-06 |
Method and apparatus for executing plurality of operations per clock cycle in a single processing unit with a self-timed and self-enabled distributed clock
Grant 6,065,126 - Tran , et al. May 16, 2 | 2000-05-16 |
Speculative store buffer
Grant 6,065,103 - Tran , et al. May 16, 2 | 2000-05-16 |
Superscalar microprocessor configured to predict return addresses from a return stack storage
Grant 6,014,734 - Tran , et al. January 11, 2 | 2000-01-11 |
Flexible resource access in a microprocessor
Grant 5,987,592 - Mahalingaiah November 16, 1 | 1999-11-16 |
Apparatus and method for patching an instruction by providing a substitute instruction or instructions from an external memory responsive to detecting an opcode of the instruction
Grant 5,983,337 - Mahalingaiah , et al. November 9, 1 | 1999-11-09 |
Apparatus and method for efficiently calculating a linear address in a microprocessor
Grant 5,961,580 - Mahalingaiah October 5, 1 | 1999-10-05 |
Speculative register storage for storing speculative results corresponding to register updated by a plurality of concurrently recorded instruction
Grant 5,933,618 - Tran , et al. August 3, 1 | 1999-08-03 |
Context-dependent memory-mapped registers for transparent expansion of a register file
Grant 5,926,646 - Pickett , et al. July 20, 1 | 1999-07-20 |
Pairing floating point exchange instruction with another floating point instruction to reduce dispatch latency
Grant 5,913,047 - Mahalingaiah , et al. June 15, 1 | 1999-06-15 |
Apparatus and method for predicting an end of loop for string instructions
Grant 5,898,865 - Mahalingaiah April 27, 1 | 1999-04-27 |
Speculative register file for storing speculative register states and removing dependencies between instructions utilizing the register
Grant 5,892,936 - Tran , et al. April 6, 1 | 1999-04-06 |
Workload balancing in a microprocessor for reduced instruction dispatch stalling
Grant 5,870,578 - Mahalingaiah , et al. February 9, 1 | 1999-02-09 |
Superscalar microprocessor configured to predict return addresses from a return stack storage
Grant 5,864,707 - Tran , et al. January 26, 1 | 1999-01-26 |
Determining microcode entry points and prefix bytes using a parallel logic technique
Grant 5,845,102 - Miller , et al. December 1, 1 | 1998-12-01 |
Apparatus for providing memory and register operands concurrently to functional units
Grant 5,835,968 - Mahalingaiah , et al. November 10, 1 | 1998-11-10 |
Apparatus and method for accessing special registers without serialization
Grant 5,787,266 - Johnson , et al. July 28, 1 | 1998-07-28 |
Interrupt transmission via specialized bus cycle within a symmetrical multiprocessing system
Grant 5,781,187 - Gephardt , et al. July 14, 1 | 1998-07-14 |
Apparatus for detecting updates to instructions which are within an instruction processing pipeline of a microprocessor
Grant 5,742,791 - Mahalingaiah , et al. April 21, 1 | 1998-04-21 |
Interrupt cascading and priority configuration for a symmetrical multiprocessing system
Grant 5,568,649 - MacDonald , et al. October 22, 1 | 1996-10-22 |
Interrupt handling mechanism to prevent spurious interrupts in a symmetrical multiprocessing system
Grant 5,564,060 - Mahalingaiah , et al. October 8, 1 | 1996-10-08 |
Interrupt control architecture for symmetrical multiprocessing system
Grant 5,555,430 - Gephardt , et al. September 10, 1 | 1996-09-10 |
Heuristic clock speed optimizing mechanism and computer system employing the same
Grant 5,490,059 - Mahalingaiah , et al. February 6, 1 | 1996-02-06 |
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