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Error reporting for non-volatile memory modules Grant 11,392,441 - Magro , et al. July 19, 2 | 2022-07-19 |
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Memory Controller With A Plurality Of Command Sub-queues And Corresponding Arbiters App 20220058141 - Magro; James R. ;   et al. | 2022-02-24 |
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Signalling For Heterogeneous Memory Systems App 20210200467 - Magro; James R. ;   et al. | 2021-07-01 |
Data Integrity For Persistent Memory Systems And The Like App 20210049062 - Balakrishnan; Kedarnath ;   et al. | 2021-02-18 |
Command arbitration for high speed memory interfaces Grant 10,684,969 - Magro , et al. | 2020-06-16 |
Memory controller with flexible address decoding Grant 10,403,333 - Brandl , et al. Sep | 2019-09-03 |
Low power memory throttling Grant 10,198,216 - Balakrishnan , et al. Fe | 2019-02-05 |
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Software mode register access for platform margining and debug Grant 9,965,222 - Brandl , et al. May 8, 2 | 2018-05-08 |
Software Mode Register Access For Platform Margining And Debug App 20180113648 - Brandl; Kevin M. ;   et al. | 2018-04-26 |
Memory Controller With Virtual Controller Mode App 20180018105 - Magro; James R. ;   et al. | 2018-01-18 |
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Multimode system for calibrating a data strobe delay for a memory read operation Grant 6,889,334 - Magro , et al. May 3, 2 | 2005-05-03 |
Apparatus and method for providing an external clock from a circuit in sleep mode in a processor-based system Grant 6,832,327 - Magro , et al. December 14, 2 | 2004-12-14 |
Peripheral interface circuit for handling graphics responses in an I/O node of a computer system Grant 6,757,755 - Askar , et al. June 29, 2 | 2004-06-29 |
SDRAM read prefetch from multiple master devices Grant 6,754,779 - Magro June 22, 2 | 2004-06-22 |
Selecting independently of tag values a given command belonging to a second virtual channel and having a flag set among commands belonging to a posted virtual and the second virtual channels Grant 6,721,816 - Magro , et al. April 13, 2 | 2004-04-13 |
System for controlling multiple memory types Grant 6,681,301 - Mehta , et al. January 20, 2 | 2004-01-20 |
Method to track master contribution information in a write buffer Grant 6,678,838 - Magro January 13, 2 | 2004-01-13 |
Performance monitoring and optimizing of controller parameters Grant 6,556,952 - Magro April 29, 2 | 2003-04-29 |
Peripheral interface circuit for handling graphics responses in an I/O node of a computer system App 20030074493 - Askar, Tahsin ;   et al. | 2003-04-17 |
Invalid configuration detection resource Grant 6,546,482 - Magro , et al. April 8, 2 | 2003-04-08 |
Synchronizing data between differing clock domains Grant 6,516,362 - Magro , et al. February 4, 2 | 2003-02-04 |
ROM/DRAM data bus sharing with write buffer and read prefetch activity Grant 6,513,094 - Magro January 28, 2 | 2003-01-28 |
Multi-purpose bi-directional control bus for carrying tokens between initiator devices and target devices Grant 6,457,078 - Magro , et al. September 24, 2 | 2002-09-24 |
Flexible microcontroller architecture Grant 6,415,348 - Mergard , et al. July 2, 2 | 2002-07-02 |
Direct memory access engine for supporting multiple virtual direct memory access channels Grant 6,260,081 - Magro , et al. July 10, 2 | 2001-07-10 |
Write-buffer FIFO architecture with random access snooping capability Grant 6,151,658 - Magro November 21, 2 | 2000-11-21 |