Magill; Kevin Neal

Patent Applications and Registrations

Patent applications and USPTO patent grants for Magill; Kevin Neal.The latest application filed is for "maintaining domain coherence states including domain state no-owned (dsn) in processor-based devices".

Company Profile

2.6.7

Magill; Kevin Neal - Durham NC

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Tracking repeated reads to guide dynamic selection of cache coherence protocols in processor-based devices Grant 11,372,757 - Magill , et al. June 28, 2	2022-06-28
Maintaining domain coherence states including domain state no-owned (DSN) in processor-based devices Grant 11,354,239 - Robinson , et al. June 7, 2	2022-06-07
Maintaining Domain Coherence States Including Domain State No-owned (dsn) In Processor-based Devices App 20220091979 - ROBINSON; Eric Francis ; et al.	2022-03-24
Tracking Repeated Reads To Guide Dynamic Selection Of Cache Coherence Protocols In Processor-based Devices App 20220075726 - MAGILL; Kevin Neal ; et al.	2022-03-10
Ticket based request flow control Grant 11,226,910 - McDonald , et al. January 18, 2	2022-01-18
Providing dynamic selection of cache coherence protocols in processor-based devices Grant 11,138,114 - Magill , et al. October 5, 2	2021-10-05
Enabling atomic memory accesses across coherence granule boundaries in processor-based devices Grant 11,093,396 - Robinson , et al. August 17, 2	2021-08-17
Providing Dynamic Selection Of Cache Coherence Protocols In Processor-based Devices App 20210209026 - MAGILL; Kevin Neal ; et al.	2021-07-08
Enabling Atomic Memory Accesses Across Coherence Granule Boundaries In Processor-based Devices App 20210141726 - ROBINSON; Eric Francis ; et al.	2021-05-13
Ticket Based Request Flow Control App 20200285597 - MCDONALD; Joseph Gerald ; et al.	2020-09-10
Converting A Stale Cache Memory Unique Request To A Read Unique Snoop Response In A Multiple (multi-) Central Processing Unit (cpu) Processor To Reduce Latency Associated With Reissuing The Stale Unique Request App 20190087333 - Robinson; Eric Francis ; et al.	2019-03-21
Techniques for mapping logical threads to physical threads in a simultaneous multithreading data processing system Grant 9,715,411 - Doing , et al. July 25, 2	2017-07-25
Techniques For Mapping Logical Threads To Physical Threads In A Simultaneous Multithreading Data Processing System App 20150220366 - Doing; Richard William ; et al.	2015-08-06

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