| Patent | Date |
|---|
Test structure for multi-layer, thin-film modules
Grant 5,262,719 - Magdo November 16, 1 | 1993-11-16 |
Dielectrically isolated semiconductor devices
Grant 4,396,933 - Magdo , et al. August 2, 1 | 1983-08-02 |
High performance semiconductor package assembly
Grant 4,322,778 - Barbour , et al. March 30, 1 | 1982-03-30 |
Integrated circuit structures with full dielectric isolation and a novel method for fabrication thereof
Grant 4,261,003 - Magdo , et al. April 7, 1 | 1981-04-07 |
Method for making a silicon mask
Grant 4,256,532 - Magdo , et al. March 17, 1 | 1981-03-17 |
Integrated circuit chip carrier and method for forming the same
Grant 4,023,197 - Magdo , et al. May 10, 1 | 1977-05-10 |
High performance integrated bipolar and complementary field effect transistors
Grant 4,016,596 - Magdo , et al. April 5, 1 | 1977-04-05 |
Semiconductor resistor having a high value resistance for use in an integrated circuit semiconductor device
Grant 4,005,471 - Magdo , et al. January 25, 1 | 1977-01-25 |
Dielectrically isolated Schottky Barrier structure and method of forming the same
Grant 3,956,527 - Magdo , et al. May 11, 1 | 1976-05-11 |
Fabricating high performance integrated bipolar and complementary field effect transistors
Grant 3,955,269 - Magdo , et al. May 11, 1 | 1976-05-11 |
Process for fabricating devices having dielectric isolation utilizing anodic treatment and selective oxidation
Grant 3,954,523 - Magdo , et al. May 4, 1 | 1976-05-04 |
Method for fabrication of integrated circuit structure with full dielectric isolation utilizing selective oxidation
Grant 3,944,447 - Magdo , et al. March 16, 1 | 1976-03-16 |
Space-charge-limited integrated circuit structure
Grant 3,936,856 - Magdo February 3, 1 | 1976-02-03 |
Integrated circuit chip carrier and method for forming the same
Grant 3,918,148 - Magdo , et al. November 11, 1 | 1975-11-11 |
Method for fabricating minute openings in insulating layers during the formation of integrated circuits
Grant 3,904,454 - Magdo , et al. September 9, 1 | 1975-09-09 |
Method for making a space charge limited transistor having recessed dielectric isolation
Grant 3,894,891 - Magdo , et al. July 15, 1 | 1975-07-15 |
Method Of Fabricating Integrated Circuit Device Structure With Complementary Elements Utilizing Selective Thermal Oxidation And Selective Epitaxial Deposition
Grant 3,861,968 - Magdo , et al. January 21, 1 | 1975-01-21 |
Dielectrically Isolated Schottky Barrier Structure And Method Of Forming The Same
Grant 3,858,231 - Magdo , et al. December 31, 1 | 1974-12-31 |
Space Charge Limited Transistor Having Recessed Dielectric Isolation
Grant 3,855,609 - Magdo , et al. December 17, 1 | 1974-12-17 |
An Integrated Circuit Test Transistor Structure And Method Of Fabricating The Same
Grant 3,774,088 - Magdo , et al. November 20, 1 | 1973-11-20 |
| 