Maesono; Atsushi

Patent Applications and Registrations

Patent applications and USPTO patent grants for Maesono; Atsushi.The latest application filed is for "semiconductor device, method for making pattern layout, method for making mask pattern, method for making layout, method for manufacturing photo mask, photo mask, and method for manufacturing semiconductor device".

Company Profile

0.2.4

Maesono; Atsushi - Yokohama-shi JP
Maesono; Atsushi - Yokohama JP

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Semiconductor device, method for making pattern layout, method for making mask pattern, method for making layout, method for manufacturing photo mask, photo mask, and method for manufacturing semiconductor device App 20100193960 - Mashita; Hiromitsu ; et al.	2010-08-05
Semiconductor device, method for making pattern layout, method for making mask pattern, method for making layout, method for manufacturing photo mask, photo mask, and method for manufacturing semiconductor device Grant 7,716,617 - Mashita , et al. May 11, 2	2010-05-11
Semiconductor memory device Grant 7,700,997 - Futatsuyama , et al. April 20, 2	2010-04-20
Photomask Designing Apparatus, Photomask, Photomask Designing Method, Photomask Designing Program And Computer-readable Storage Medium On Which The Photomask Designing Program Is Stored App 20080014510 - FUJISAWA; Tadahito ; et al.	2008-01-17
Semiconductor memory device App 20060197136 - Futatsuyama; Takuya ; et al.	2006-09-07
Semiconductor device, method for making pattern layout, method for making mask pattern, method for making layout, method for manufacturing photo mask, photo mask, and method for manufacturing semiconductor device App 20060157833 - Mashita; Hiromitsu ; et al.	2006-07-20

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