loadpatents
name:-0.089545011520386
name:-0.031100034713745
name:-0.0016090869903564
Maeding; Nicolas Patent Filings

Maeding; Nicolas

Patent Applications and Registrations

Patent applications and USPTO patent grants for Maeding; Nicolas.The latest application filed is for "integrated circuit chip and a method for testing the same".

Company Profile
1.15.15
  • Maeding; Nicolas - Holzgerlingen DE
  • Maeding; Nicolas - Holzgelingen DE
  • Maeding; Nicolas - Holzgertingen DE
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Integrated circuit chip and a method for testing the same
Grant 10,317,465 - Haller , et al.
2019-06-11
Integrated Circuit Chip And A Method For Testing The Same
App 20180231607 - Haller; Wilhelm ;   et al.
2018-08-16
Integrated circuit chip and a method for testing the same
Grant 10,006,965 - Haller , et al. June 26, 2
2018-06-26
Integrated Circuit Chip And A Method For Testing The Same
App 20170003345 - Haller; Wilhelm ;   et al.
2017-01-05
Integrated circuit chip and a method for testing the same
Grant 9,506,986 - Haller , et al. November 29, 2
2016-11-29
Integrated Circuit Chip and a Method for Testing the Same
App 20150160293 - Haller; Wilhelm ;   et al.
2015-06-11
Electronic computing circuit for operand width reduction for a modulo adder followed by saturation concurrent message processing
Grant 8,370,409 - Gemmeke , et al. February 5, 2
2013-02-05
Instruction set architecture with instruction characteristic bit indicating a result is not of architectural importance
Grant 8,266,411 - Gemmeke , et al. September 11, 2
2012-09-11
Systems and methods for transferring data to maintain preferred slot positions in a bi-endian processor
Grant 8,145,804 - Flachs , et al. March 27, 2
2012-03-27
Method to reduce power consumption of a register file with multi SMT support
Grant 8,046,566 - Abernathy , et al. October 25, 2
2011-10-25
Method of operand width reduction to enable usage of narrower saturation adder
Grant 7,962,538 - Gemmeke , et al. June 14, 2
2011-06-14
Systems and Methods for Transferring Data to Maintain Preferred Slot Positions in a Bi-endian Processor
App 20110072170 - Flachs; Brian King ;   et al.
2011-03-24
Method and system for verifying the equivalence of digital circuits
Grant 7,890,901 - Gemmeke , et al. February 15, 2
2011-02-15
Formally deriving a minimal clock-gating scheme
Grant 7,849,428 - Barowski , et al. December 7, 2
2010-12-07
Electronic circuit for implementing a permutation operation
Grant 7,783,690 - Leenstra , et al. August 24, 2
2010-08-24
Instruction Set Architecture With Decomposing Operands
App 20100199074 - Gemmeke; Tobias ;   et al.
2010-08-05
Method and apparatus for register renaming
Grant 7,769,986 - Abernathy , et al. August 3, 2
2010-08-03
Circuit design optimization of integrated circuit based clock gated memory elements
Grant 7,676,778 - Arbel , et al. March 9, 2
2010-03-09
Method And Electronic Computing Circuit For Operand Width Reduction For A Modulo Adder Followed By Saturation Concurrent Message Processing
App 20100057825 - Gemmeke; Tobias ;   et al.
2010-03-04
Method to Reduce Power Consumption of a Register File with Multi SMT Support
App 20090292892 - Abernathy; Christopher M. ;   et al.
2009-11-26
Method and apparatus for performing equivalence checking on circuit designs having differing clocking and latching schemes
Grant 7,624,363 - Baumgartner , et al. November 24, 2
2009-11-24
Multi-cycle Register File Bypass
App 20090249035 - Barowski; Harry ;   et al.
2009-10-01
Circuit Design Optimization Of Integrated Circuit Based Clock Gated Memory Elements
App 20090013289 - Arbel; Eli ;   et al.
2009-01-08
Formally deriving a minimal clock-gating scheme
App 20080288901 - Barowski; Harry ;   et al.
2008-11-20
Method And Apparatus For Register Renaming
App 20080276076 - Abernathy; Christopher Michael ;   et al.
2008-11-06
Method and Apparatus for Performing Equivalence Checking on Circuit Designs Having Differing Clocking and Latching Schemes
App 20080209287 - Baumgartner; Jason R. ;   et al.
2008-08-28
Method And System For Verifying The Equivalence Of Digital Circuits
App 20070226664 - Gemmeke; Tobias ;   et al.
2007-09-27
Method Of Operand Width Reduction To Enable Usage Of Narrower Saturation Adder
App 20070180016 - Gemmeke; Tobias ;   et al.
2007-08-02
Electronic circuit for implementing a permutation operation
App 20070011220 - Leenstra; Jens ;   et al.
2007-01-11

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