Maeda; Sumiko
Patent Applications and Registrations
Patent applications and USPTO patent grants for Maeda; Sumiko.The latest application filed is for "logic verification device, logic verification method and logic verification computer program".
- Maeda; Sumiko - Kawasaki JP
- Maeda; Sumiko - Yokohama JP
| Patent | Date |
|---|---|
| Logic verification device, logic verification method and logic verification computer program Grant 7,131,086 - Yamasaki , et al. October 31, 2 | 2006-10-31 |
| Logic verification device, logic verification method and logic verification computer program App 20050229122 - Yamasaki, Junya ; et al. | 2005-10-13 |
| Method for making electronic circuit design data and CAD system using the method Grant 5,856,925 - Maeda , et al. January 5, 1 | 1999-01-05 |
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