Madhukar; Sucharita
Patent Applications and Registrations
Patent applications and USPTO patent grants for Madhukar; Sucharita.The latest application filed is for "dielectric k value tuning of hah stack for improved tddb performance of logic decoupling capacitor or embedded dram".
- Madhukar; Sucharita - San Jose CA
- Madhukar, Sucharita - Austin TX
| Patent | Date |
|---|---|
| Dielectric K Value Tuning of HAH Stack for Improved TDDB Performance of Logic Decoupling Capacitor or Embedded DRAM App 20150170837 - Madhukar; Sucharita ; et al. | 2015-06-18 |
| Dual metal gate transistors for CMOS process Grant 6,794,281 - Madhukar , et al. September 21, 2 | 2004-09-21 |
| Dual metal gate transistors for CMOS process App 20030216038 - Madhukar, Sucharita ; et al. | 2003-11-20 |
| Dual metal gate transistors for CMOS process Grant 6,545,324 - Madhukar , et al. April 8, 2 | 2003-04-08 |
| Dual metal gate transistors for CMOS process App 20020135023 - Madhukar, Sucharita ; et al. | 2002-09-26 |
| Dual metal gate transistors for CMOS process Grant 6,444,512 - Madhukar , et al. September 3, 2 | 2002-09-03 |
| Memory device and method for using prefabricated isolated storage elements Grant 6,413,819 - Zafar , et al. July 2, 2 | 2002-07-02 |
| Device Structure For Storing Charge And Method Therefore App 20020076850 - Sadd, Michael A. ; et al. | 2002-06-20 |
| Memory cell and method for programming thereof Grant 6,320,784 - Muralidhar , et al. November 20, 2 | 2001-11-20 |
| Memory device that includes passivated nanoclusters and method for manufacture Grant 6,297,095 - Muralidhar , et al. October 2, 2 | 2001-10-02 |
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