Maangat; Simardeep

Patent Applications and Registrations

Patent applications and USPTO patent grants for Maangat; Simardeep.The latest application filed is for "very low voltage reference circuit".

Company Profile

0.29.9

Maangat; Simardeep - San Jose CA
Maangat; Simardeep - Sunnyvale CA US

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Techniques for bypassing circuits during tests Grant 9,203,412 - Moore , et al. December 1, 2	2015-12-01
High resolution capacitor Grant 8,933,751 - Wong , et al. January 13, 2	2015-01-13
Offset cancellation in equalizer circuitry Grant 8,417,752 - Chan , et al. April 9, 2	2013-04-09
Very Low Voltage Reference Circuit App 20120235662 - Ratnakumar; Albert ; et al.	2012-09-20
Very low voltage reference circuit Grant 8,264,214 - Ratnakumar , et al. September 11, 2	2012-09-11
Digital adaptation circuitry and methods for programmable logic devices Grant 8,208,523 - Wong , et al. June 26, 2	2012-06-26
Adaptive equalization methods and apparatus for programmable logic devices Grant 8,194,724 - Wong , et al. June 5, 2	2012-06-05
Voltage-controlled oscillator methods and apparatus Grant 8,120,429 - Hoang , et al. February 21, 2	2012-02-21
Level shifter circuit with a thin gate oxide transistor Grant 8,049,532 - Maangat , et al. November 1, 2	2011-11-01
Techniques relating to oscillators Grant 8,035,453 - Wong , et al. October 11, 2	2011-10-11
Digital Adaptation Circuitry And Methods For Programmable Logic Devices App 20110188564 - Wong; Wilson ; et al.	2011-08-04
High-speed serial interface circuitry for programmable logic device integrated circuits Grant 7,944,235 - Shumarayev , et al. May 17, 2	2011-05-17
Digital adaptation circuitry and methods for programmable logic devices Grant 7,920,621 - Wong , et al. April 5, 2	2011-04-05
Versatile common-mode driver methods and apparatus Grant 7,855,576 - Luo , et al. December 21, 2	2010-12-21
Half-rate DFE with duplicate path for high data-rate operation Grant 7,782,935 - Wong , et al. August 24, 2	2010-08-24
Increased sensitivity and reduced offset variation in high data rate HSSI receiver Grant 7,777,526 - Shumarayev , et al. August 17, 2	2010-08-17
Adaptive equalization methods and apparatus for programmable logic devices Grant 7,773,668 - Wong , et al. August 10, 2	2010-08-10
Programmable digital equalization control circuitry and methods Grant 7,760,799 - Lai , et al. July 20, 2	2010-07-20
Signal adjustment receiver circuitry Grant 7,733,997 - Lai , et al. June 8, 2	2010-06-08
Voltage-controlled oscillator methods and apparatus Grant 7,728,674 - Hoang , et al. June 1, 2	2010-06-01
High-speed serial data receiver architecture Grant 7,702,011 - Tran , et al. April 20, 2	2010-04-20
Programmable receiver equalization circuitry and methods Grant 7,697,600 - Maangat , et al. April 13, 2	2010-04-13
High-speed serial interface circuitry for programmable logic device integrated circuits Grant 7,688,106 - Shumarayev , et al. March 30, 2	2010-03-30
Techniques for power management on integrated circuits Grant 7,638,990 - Shumarayev , et al. December 29, 2	2009-12-29
Increased Sensitivity And Reduced Offset Variation In High Data Rate Hssi Receiver App 20090302888 - Shumarayev; Sergey ; et al.	2009-12-10
Systems and methods for offset cancellation in integrated transceivers Grant 7,586,983 - Shumarayev , et al. September 8, 2	2009-09-08
Signal amplitude detection circuitry without pattern dependencies for high-speed serial links Grant 7,576,570 - Wong , et al. August 18, 2	2009-08-18
Digital adaptation circuitry and methods for programmable logic devices App 20080069276 - Wong; Wilson ; et al.	2008-03-20
Methods and apparatus to DC couple LVDS driver to CML levels Grant 7,304,494 - Wong , et al. December 4, 2	2007-12-04
Selectable inversion of differential input and/or output pins in programmable logic devices Grant 7,242,221 - Hoang , et al. July 10, 2	2007-07-10
Signal adjustment receiver circuitry App 20070147478 - Lai; Tin H. ; et al.	2007-06-28
Programmable digital equalization control circuitry and methods App 20070071084 - Lai; Tin H. ; et al.	2007-03-29
High-speed serial data receiver architecture App 20070041455 - Tran; Thungoc M. ; et al.	2007-02-22
Programmable receiver equalization circuitry and methods App 20070014344 - Maangat; Simardeep ; et al.	2007-01-18
Integrated circuit delay chains Grant 7,154,324 - Maangat , et al. December 26, 2	2006-12-26
Methods and apparatus to DC couple LVDS driver to CML levels App 20060220681 - Wong; Wilson ; et al.	2006-10-05

uspto.report is an independent third-party trademark research tool that is not affiliated, endorsed, or sponsored by the United States Patent and Trademark Office (USPTO) or any other governmental organization. The information provided by uspto.report is based on publicly available data at the time of writing and is intended for informational purposes only.

While we strive to provide accurate and up-to-date information, we do not guarantee the accuracy, completeness, reliability, or suitability of the information displayed on this site. The use of this site is at your own risk. Any reliance you place on such information is therefore strictly at your own risk.

All official trademark data, including owner information, should be verified by visiting the official USPTO website at www.uspto.gov. This site is not intended to replace professional legal advice and should not be used as a substitute for consulting with a legal professional who is knowledgeable about trademark law.