Ma; Szu-Tsun
Patent Applications and Registrations
Patent applications and USPTO patent grants for Ma; Szu-Tsun.The latest application filed is for "method and system for analyzing defects of an integrated circuit wafer".
- Ma; Szu-Tsun - Hsinchu CN
| Patent | Date |
|---|---|
| Method and system for analyzing defects of an integrated circuit wafer Grant 7,208,328 - Liao , et al. April 24, 2 | 2007-04-24 |
| Method and system for analyzing defects of an integrated circuit wafer App 20050210423 - Liao, Shu-Sing ; et al. | 2005-09-22 |
| Method of boosting wafer cleaning efficiency and increasing process yield Grant 6,773,933 - Ma , et al. August 10, 2 | 2004-08-10 |
| Method For Preventing Corrosion Of Tungsten Plug App 20040152305 - YIU, CHUNG-LUNG ; et al. | 2004-08-05 |
| [method Of Fabricating Shallow Trench Isolation] App 20040126962 - Ma, Szu-Tsun ; et al. | 2004-07-01 |
| Fabrication method for shallow trench isolation Grant 6,706,612 - Ma , et al. March 16, 2 | 2004-03-16 |
| Fabrication method for shallow trench isolation App 20040005765 - Ma, Szu-Tsun ; et al. | 2004-01-08 |
| Method of boosting wafer cleaning efficiency and increasing process yield App 20040005780 - Ma, Szu-Tsun ; et al. | 2004-01-08 |
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