Ma; Haibing

Patent Applications and Registrations

Patent applications and USPTO patent grants for Ma; Haibing.The latest application filed is for "hdl co-simulation in a high-level modeling system".

Company Profile

0.18.1

Ma; Haibing - Superior CO US
Ma; Haibing - Boulder CO

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Method and apparatus for providing program-based hardware co-simulation of a circuit design Grant 8,600,722 - Chan , et al. December 3, 2	2013-12-03
Reloadable just-in-time compilation simulation engine for high level modeling systems Grant 8,352,229 - Ma , et al. January 8, 2	2013-01-08
Clustering of electronic circuit design modules for hardware-based and software-based co-simulation platforms Grant 8,145,466 - Chan , et al. March 27, 2	2012-03-27
Hardware description interface for a high-level modeling system Grant 8,079,013 - Ma , et al. December 13, 2	2011-12-13
Synchronization for a modeling system Grant 8,042,079 - Sundararajan , et al. October 18, 2	2011-10-18
Conversion of a high-level graphical circuit design block to a high-level language program Grant 7,992,111 - Ma , et al. August 2, 2	2011-08-02
Multi-rate simulation scheduler for synchronous digital circuits in a high level modeling system Grant 7,895,026 - Kelly , et al. February 22, 2	2011-02-22
Translation of a program in a dynamically-typed language to a program in a hardware description language Grant 7,895,584 - Ma , et al. February 22, 2	2011-02-22
Method and apparatus for modeling multiple instances of an electronic circuit using an imperative programming language description Grant 7,725,869 - Milne , et al. May 25, 2	2010-05-25
Hardware and software implementation of an electronic design in a programmable logic device Grant 7,669,164 - Ma , et al. February 23, 2	2010-02-23
Method and system for parameterization of imperative-language functions intended as hardware generators Grant 7,620,942 - Ma , et al. November 17, 2	2009-11-17
Method and apparatus for translating an imperative programming language description of a circuit into a hardware description Grant 7,395,521 - Ma , et al. July 1, 2	2008-07-01
HDL co-simulation in a high-level modeling system Grant 7,203,632 - Milne , et al. April 10, 2	2007-04-10
Simulation of integrated circuitry within a high-level modeling system using hardware description language circuit descriptions Grant 7,194,705 - Deepak , et al. March 20, 2	2007-03-20
Incremental netlisting Grant 7,086,030 - Stroomer , et al. August 1, 2	2006-08-01
Specification of the hierarchy, connectivity, and graphical representation of a circuit design Grant 7,003,751 - Stroomer , et al. February 21, 2	2006-02-21
Method of inlining a VHDL function call into Verilog Grant 6,957,423 - Ma October 18, 2	2005-10-18
HDL Co-simulation in a high-level modeling system App 20040181385 - Milne, Roger B. ; et al.	2004-09-16

Company Registrations

NCAGE Code	6P8U2	MA, HAIBING
CAGE Code	6P8U2	MA, HAIBING

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