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Patent applications and USPTO patent grants for Luong; Trong V..The latest application filed is for "structure for a limited switch dynamic logic cell based register".
Patent | Date |
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High performance, low power, dynamically latched up/down counter Grant 7,587,020 - Law , et al. September 8, 2 | 2009-09-08 |
Limited switch dynamic logic cell based register Grant 7,557,616 - Klim , et al. July 7, 2 | 2009-07-07 |
Limited Switch Dynamic Logic Cell Based Register App 20090108874 - Klim; Peter J. ;   et al. | 2009-04-30 |
Structure for a Limited Switch Dynamic Logic Cell Based Register App 20090108875 - Klim; Peter J. ;   et al. | 2009-04-30 |
Digital frequency multiplier circuit Grant 7,525,393 - Ngo , et al. April 28, 2 | 2009-04-28 |
Self-Resetting Phase Frequency Detector with Multiple Ranges of Clock Difference App 20080265957 - Luong; Trong V. ;   et al. | 2008-10-30 |
Digital Frequency Multiplier Circuit App 20080266000 - Ngo; Hung C. ;   et al. | 2008-10-30 |
High Performance, Low Power, Dynamically Latched Up/Down Counter App 20080267341 - Law; Jethro C. ;   et al. | 2008-10-30 |
Limited switch dynamic logic cell based register Grant 7,414,436 - Klim , et al. August 19, 2 | 2008-08-19 |
Hybrid Keeper Circuit for Dynamic Logic App 20080116938 - Ngo; Hung C. ;   et al. | 2008-05-22 |
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