Luo; Kun-Lun

Patent Applications and Registrations

Patent applications and USPTO patent grants for Luo; Kun-Lun.The latest application filed is for "device and method for generating input control signals of a serialized compressed scan circuit".

Company Profile

0.11.13

Luo; Kun-Lun - Hsinchu TW
Luo; Kun-Lun - Hsinchu City TW
Luo; Kun-Lun - Ksinchu City TW

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Device and method for generating input control signals of a serialized compressed scan circuit Grant 9,459,319 - Chen , et al. October 4, 2	2016-10-04
Device And Method For Generating Input Control Signals Of A Serialized Compressed Scan Circuit App 20150036783 - Chen; Chen-An ; et al.	2015-02-05
Repairable multi-layer memory chip stack and method thereof Grant 8,867,286 - Wu , et al. October 21, 2	2014-10-21
Test device and method for the SoC test architecture Grant 8,555,123 - Wu , et al. October 8, 2	2013-10-08
Repairable Multi-layer Memory Chip Stack And Method Thereof App 20130155794 - Wu; Ming-Hsueh ; et al.	2013-06-20
Test Device and Method for the SoC Test Architecture App 20120159251 - Wu; Ming-Hsueh ; et al.	2012-06-21
Test device and method for hierarchical test architecture Grant 8,185,782 - Luo May 22, 2	2012-05-22
Test Device And Method For The Soc Test Architecture App 20100023807 - WU; Ming-Shae ; et al.	2010-01-28
Method and apparatus of build-in self-diagnosis and repair in a memory with syndrome identification Grant 7,644,323 - Wu , et al. January 5, 2	2010-01-05
Test Device And Method For Hierarchical Test Architecture App 20090259889 - Luo; Kun-Lun	2009-10-15
Wrapper testing circuits and method thereof for system-on-a-chip Grant 7,506,231 - Chang , et al. March 17, 2	2009-03-17
Scan Test Data Compression Method And Decoding Apparatus For Multiple-Scan-Chain Designs App 20080133990 - Lin; Shih-Ping ; et al.	2008-06-05
Built-in memory current test circuit Grant 7,319,625 - Chang , et al. January 15, 2	2008-01-15
Method And Apparatus Of Build-In Self-Diagnosis And Repair In A Memory With Syndrome Identification App 20070288807 - Wu; Cheng-Wen ; et al.	2007-12-13
Wrapper testing circuits and method thereof for system-on-a-chip App 20070255986 - Chang; Yeong-Jar ; et al.	2007-11-01
Built-in memory current test circuit App 20070153597 - Chang; Yeong-Jar ; et al.	2007-07-05
Method and apparatus of build-in self-diagnosis and repair in a memory with syndrome identification Grant 7,228,468 - Wu , et al. June 5, 2	2007-06-05
Wrapper testing circuits and method thereof for system-on-a-chip App 20060156104 - Chang; Yeong-Jar ; et al.	2006-07-13
Method and apparatus of build-in self-diagnosis and repair in a memory with syndrome identification App 20060064618 - Wu; Cheng-Wen ; et al.	2006-03-23
Built-in jitter measurement circuit for voltage controlled oscillator and phase locked loop Grant 6,937,106 - Chang , et al. August 30, 2	2005-08-30
Built-in jitter measurement circuit for voltage controlled oscillator and phase locked loop App 20050057312 - Chang, Yeong-Jar ; et al.	2005-03-17

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