Lung; Yuan-Hsiang
Patent Applications and Registrations
Patent applications and USPTO patent grants for Lung; Yuan-Hsiang.The latest application filed is for "method for improving circuit layout for manufacturability".
- Lung; Yuan-Hsiang - Hsinchu TW
- Lung; Yuan-Hsiang - Hsinchu City TW
| Patent | Date |
|---|---|
| Method for improving circuit layout for manufacturability Grant 11,392,745 - Wu , et al. July 19, 2 | 2022-07-19 |
| Pattern fidelity enhancement with directional patterning technology Grant 11,158,509 - Shen , et al. October 26, 2 | 2021-10-26 |
| Method for Improving Circuit Layout for Manufacturability App 20210089697 - Wu; Yun-Lin ; et al. | 2021-03-25 |
| Method for improving circuit layout for manufacturability Grant 10,853,552 - Wu , et al. December 1, 2 | 2020-12-01 |
| Pattern Fidelity Enhancement with Directional Patterning Technology App 20200279743 - Shen; Yu-Tien ; et al. | 2020-09-03 |
| Method for integrated circuit patterning Grant 10,727,061 - Yang , et al. | 2020-07-28 |
| Pattern fidelity enhancement with directional patterning technology Grant 10,658,184 - Shen , et al. | 2020-05-19 |
| Method For Improving Circuit Layout For Manufacturability App 20190258770 - Wu; Yun-Lin ; et al. | 2019-08-22 |
| Method for improving circuit layout for manufacturability Grant 10,282,504 - Wu , et al. | 2019-05-07 |
| Method for Integrated Circuit Patterning App 20180233368 - Yang; Tsung-Lin ; et al. | 2018-08-16 |
| Pattern Fidelity Enhancement with Directional Patterning Technology App 20180174853 - Shen; Yu-Tien ; et al. | 2018-06-21 |
| Method for integrated circuit patterning Grant 9,941,125 - Yang , et al. April 10, 2 | 2018-04-10 |
| Method for Improving Circuit Layout for Manufacturability App 20180096090 - Wu; Yun-Lin ; et al. | 2018-04-05 |
| Integrated circuit design method Grant 9,754,064 - Su , et al. September 5, 2 | 2017-09-05 |
| Method for Integrated Circuit Patterning App 20170062222 - Yang; Tsung-Lin ; et al. | 2017-03-02 |
| Integrated Circuit Design Method App 20170024507 - SU; Chuan-Fang ; et al. | 2017-01-26 |
| Integrated circuit design method Grant 9,477,804 - Su , et al. October 25, 2 | 2016-10-25 |
| Integrated Circuit Design Method App 20160210395 - SU; Chuan-Fang ; et al. | 2016-07-21 |
| Metal cut process flow Grant 8,850,369 - Lung , et al. September 30, 2 | 2014-09-30 |
| Metal Cut Process Flow App 20130280909 - Lung; Yuan-Hsiang ; et al. | 2013-10-24 |
uspto.report is an independent third-party trademark research tool that is not affiliated, endorsed, or sponsored by the United States Patent and Trademark Office (USPTO) or any other governmental organization. The information provided by uspto.report is based on publicly available data at the time of writing and is intended for informational purposes only.
While we strive to provide accurate and up-to-date information, we do not guarantee the accuracy, completeness, reliability, or suitability of the information displayed on this site. The use of this site is at your own risk. Any reliance you place on such information is therefore strictly at your own risk.
All official trademark data, including owner information, should be verified by visiting the official USPTO website at www.uspto.gov. This site is not intended to replace professional legal advice and should not be used as a substitute for consulting with a legal professional who is knowledgeable about trademark law.
| 