loadpatents
name:-0.062141895294189
name:-0.064698934555054
name:-0.00049805641174316
Luick; David Arnold Patent Filings

Luick; David Arnold

Patent Applications and Registrations

Patent applications and USPTO patent grants for Luick; David Arnold.The latest application filed is for "design structure for scalar precision float implementation on the "w" lane of vector unit".

Company Profile
0.50.49
  • Luick; David Arnold - Rochester MN
  • Luick; David Arnold - Rocheser MN
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Scalar precision float implementation on the "W" lane of vector unit
Grant 8,169,439 - Luick , et al. May 1, 2
2012-05-01
Store misaligned vector with permute
Grant 8,161,271 - Luick , et al. April 17, 2
2012-04-17
Multithreaded processor and method for switching threads by swapping instructions between buffers while pausing execution
Grant 8,140,829 - Eickemeyer , et al. March 20, 2
2012-03-20
Structure for a single shared instruction predecoder for supporting multiple processors
Grant 8,001,361 - Luick August 16, 2
2011-08-16
Design structure for single hot forward interconnect scheme for delayed execution pipelines
Grant 7,984,272 - Luick July 19, 2
2011-07-19
Method and apparatus for accessing a cache with an effective address
Grant 7,937,530 - Luick May 3, 2
2011-05-03
In situ register state error recovery and restart mechanism
Grant 7,865,769 - Luick January 4, 2
2011-01-04
Load misaligned vector with permute and mask insert
Grant 7,783,860 - Luick , et al. August 24, 2
2010-08-24
Single hot forward interconnect scheme for delayed execution pipelines
Grant 7,769,987 - Luick August 3, 2
2010-08-03
Register file bit and method for fast context switch
Grant 7,743,237 - Luick June 22, 2
2010-06-22
Method and apparatus for multiple load instruction execution
Grant 7,730,288 - Luick June 1, 2
2010-06-01
Method and apparatus for accessing a split cache directory
Grant 7,680,985 - Luick March 16, 2
2010-03-16
Design Structure For Scalar Precision Float Implementation On The "w" Lane Of Vector Unit
App 20090106525 - LUICK; David Arnold ;   et al.
2009-04-23
Scalar Float Register Overlay on Vector Register File for Efficient Register Allocation and Scalar Float and Vector Register Sharing
App 20090106526 - Luick; David Arnold ;   et al.
2009-04-23
Scalar Precision Float Implementation on the "W" Lane of Vector Unit
App 20090106527 - Luick; David Arnold ;   et al.
2009-04-23
Multiple Parallel Pipeline Processor Having Self-Repairing Capability
App 20090044049 - Luick; David Arnold
2009-02-12
Load Misaligned Vector with Permute and Mask Insert
App 20090037694 - Luick; David Arnold ;   et al.
2009-02-05
Method and apparatus for transferring control in a computer system with dynamic compilation capability
Grant 7,487,330 - Altman , et al. February 3, 2
2009-02-03
Store Misaligned Vector with Permute
App 20090015589 - Luick; David Arnold ;   et al.
2009-01-15
Design Structure For Accessing A Cache With An Effective Address
App 20090006753 - LUICK; DAVID ARNOLD
2009-01-01
Single Hot Forward Interconnect Scheme for Delayed Execution Pipelines
App 20090006819 - Luick; David Arnold
2009-01-01
L2 Cache/Nest Address Translation
App 20090006803 - Luick; David Arnold
2009-01-01
Method and Apparatus for Multiple Load Instruction Execution
App 20090006818 - Luick; David Arnold
2009-01-01
In Situ Register State Error Recovery and Restart Mechanism
App 20090006905 - Luick; David Arnold
2009-01-01
Design Structure For Single Hot Forward Interconnect Scheme For Delayed Execution Pipelines
App 20090006823 - LUICK; DAVID Arnold
2009-01-01
Method and Apparatus for Accessing a Split Cache Directory
App 20090006768 - Luick; David Arnold
2009-01-01
Shared, Low Cost and Featureable Performance Monitor Unit
App 20090006036 - Luick; David Arnold
2009-01-01
Method and Apparatus for Accessing a Cache With an Effective Address
App 20090006812 - Luick; David Arnold
2009-01-01
Unified Cascaded Delayed Execution Pipeline for Fixed and Floating Point Instructions
App 20080313438 - Luick; David Arnold
2008-12-18
Structure For A Single Shared Instruction Predecoder For Supporting Multiple Processors
App 20080162883 - Luick; David Arnold
2008-07-03
Single cycle context switching by swapping a primary latch value and a selected secondary latch value in a register file
Grant 7,343,480 - Luick March 11, 2
2008-03-11
Register File Bit And Method For Fast Context Switch
App 20070294515 - Luick; David Arnold
2007-12-20
Error detection during processor idle cycles
Grant 7,272,751 - Beacom , et al. September 18, 2
2007-09-18
Instruction group formation and mechanism for SMT dispatch
Grant 7,237,094 - Curran , et al. June 26, 2
2007-06-26
Computer system architecture for a processor connected to a high speed bus transceiver
Grant 7,234,017 - Biran , et al. June 19, 2
2007-06-19
Apparatus and method for selecting instructions for execution based on bank prediction of a multi-bank cache
Grant 7,219,185 - Luick May 15, 2
2007-05-15
Reproducing errors via inhibit switches
Grant 7,200,773 - Luick April 3, 2
2007-04-03
High frequency compound instruction mechanism and method for a compare operation in an arithmetic logic unit
Grant 7,191,432 - Luick March 13, 2
2007-03-13
Multiple Parallel Pipeline Processor Having Self-Repairing Capability
App 20070011434 - Luick; David Arnold
2007-01-11
Multiple parallel pipeline processor having self-repairing capability
Grant 7,124,318 - Luick October 17, 2
2006-10-17
Multiple processor core device having shareable functional units for self-repairing capability
Grant 7,117,389 - Luick October 3, 2
2006-10-03
Apparatus and method for pre-fetching data to cached memory using persistent historical page table data
Grant 7,099,999 - Luick August 29, 2
2006-08-29
Computer system architecture
App 20060190668 - Biran; Giora ;   et al.
2006-08-24
Apparatus and method for pre-fetching page data using segment table data
Grant 7,089,370 - Luick August 8, 2
2006-08-08
Method and apparatus to eliminate processor core hot spots
Grant 7,086,058 - Luick August 1, 2
2006-08-01
Adaptive runtime repairable entry register file
Grant 7,065,694 - Luick June 20, 2
2006-06-20
Fast forwarding ALU
Grant 7,058,678 - Luick June 6, 2
2006-06-06
Cache line purge and update instruction
Grant 7,047,365 - Kunkel , et al. May 16, 2
2006-05-16
Instruction group formation and mechanism for SMT dispatch
App 20060101241 - Curran; Brian William ;   et al.
2006-05-11
Transmission error checking in result forwarding
Grant 7,024,618 - Luick April 4, 2
2006-04-04
Wide adder with critical path of three gates
Grant 6,990,510 - Friend , et al. January 24, 2
2006-01-24
Method and apparatus for detecting pipeline address conflict using parallel compares of multiple real addresses
Grant 6,963,964 - Luick November 8, 2
2005-11-08
Apparatus and method for selecting instructions for execution based on bank prediction of a multi-bank cache
App 20050240733 - Luick, David Arnold
2005-10-27
Zero delay data cache effective address generation
Grant 6,941,421 - Luick September 6, 2
2005-09-06
Reproducing errors via inhibit switches
App 20050188264 - Luick, David Arnold
2005-08-25
Processor error detection
App 20050172172 - Beacom, Thomas Joseph ;   et al.
2005-08-04
Scheme to encode predicted values into an instruction stream/cache without additional bits/area
Grant 6,912,649 - Luick June 28, 2
2005-06-28
Result forwarding of either input operand to same operand input to reduce forwarding path
Grant 6,901,504 - Luick May 31, 2
2005-05-31
Multithreaded processor and method for switching threads
App 20050114856 - Eickemeyer, Richard James ;   et al.
2005-05-26
Register file bit and method for fast context switch
App 20050081018 - Luick, David Arnold
2005-04-14
History-based carry predictor for data cache address generation
Grant 6,877,069 - Luick April 5, 2
2005-04-05
Adaptive runtime repairable entry register file
App 20050071723 - Luick, David Arnold
2005-03-31
Apparatus and method for pre-fetching data to cached memory using persistent historical page table data
App 20050071571 - Luick, David Arnold
2005-03-31
Apparatus and method for pre-fetching page data using segment table data
App 20050071601 - Luick, David Arnold
2005-03-31
Multiple parallel pipeline processor having self-repairing capability
App 20050066148 - Luick, David Arnold
2005-03-24
Multiple processor core device having shareable functional units for self-repairing capability
App 20050066079 - Luick, David Arnold
2005-03-24
Carry generation in address calculation
Grant 6,868,489 - Luick March 15, 2
2005-03-15
High frequency compound instruction mechanism and method
App 20040249878 - Luick, David Arnold
2004-12-09
Method and apparatus for detecting pipeline address conflict using compare of byte addresses
Grant 6,804,759 - Luick October 12, 2
2004-10-12
Instruction pair detection and pseudo ports for cache array
Grant 6,775,735 - Luick August 10, 2
2004-08-10
Instruction pair detection and pseudo ports for cache array
Grant 6,763,421 - Luick July 13, 2
2004-07-13
Zero delay data cache effective address generation
App 20040083350 - Luick, David Arnold
2004-04-29
Method and apparatus for transferring control in a computer system with dynamic compilation capability
App 20040044880 - Altman, Erik R. ;   et al.
2004-03-04
Method and apparatus to eliminate processor core hot spots
App 20030229662 - Luick, David Arnold
2003-12-11
History-based carry predictor for data cache address generation
App 20030188124 - Luick, David Arnold
2003-10-02
Method and apparatus for detecting pipeline address conflict using parallel compares of multiple real addresses
App 20030177335 - Luick, David Arnold
2003-09-18
Scheme to encode predicted values into an instruction stream/cache without additional bits/area
App 20030177338 - Luick, David Arnold
2003-09-18
Method and apparatus for detecting pipeline address conflict using compare of byte addresses
App 20030177326 - Luick, David Arnold
2003-09-18
Transmission error checking in result forwarding
App 20030149932 - Luick, David Arnold
2003-08-07
Interleaved arithmetic logic units
App 20030140076 - Luick, David Arnold ;   et al.
2003-07-24
Result forwarding in high performance processors
App 20030140217 - Luick, David Arnold
2003-07-24
Cache line purge and update instruction
App 20030140199 - Kunkel, Steven R. ;   et al.
2003-07-24
Wide adder with critical path of three gates
App 20030140080 - Friend, David Michael ;   et al.
2003-07-24
Fast forwarding ALU
App 20030126178 - Luick, David Arnold
2003-07-03
Carry generation in address calculation
App 20030126401 - Luick, David Arnold
2003-07-03
Instruction pair detection and pseudo ports for cache array
App 20030074532 - Luick, David Arnold
2003-04-17
Instruction pair detection and pseudo ports for cache array
App 20030074533 - Luick, David Arnold
2003-04-17
Partition of on-chip memory buffer for cache
App 20020062418 - Luick, David Arnold
2002-05-23
Scheme to partition a large lookaside buffer into an L2 cache array
Grant 6,349,362 - Luick February 19, 2
2002-02-19
Branch history cache
Grant 6,314,493 - Luick No
2001-11-06
Circuit arrangement and method of speculative instruction execution utilizing instruction history caching
Grant 6,230,260 - Luick May 8, 2
2001-05-08
Method and apparatus to select the next instruction in a superscalar or a very long instruction word computer having N-way branching
Grant 6,112,299 - Ebcioglu , et al. August 29, 2
2000-08-29
Multiprocessor cache coherence directed by combined local and global tables
Grant 6,088,769 - Luick , et al. July 11, 2
2000-07-11
Multi-ported and interleaved cache memory supporting multiple simultaneous accesses thereto
Grant 5,924,117 - Luick July 13, 1
1999-07-13
System for restoring register data in a pipelined data processing system using latch feedback assemblies
Grant 5,875,346 - Luick February 23, 1
1999-02-23
Reordering of memory reference operations and conflict resolution via rollback in a multiprocessing environment
Grant 5,872,990 - Luick , et al. February 16, 1
1999-02-16
Compression architecture for system memory application
Grant 5,812,817 - Hovis , et al. September 22, 1
1998-09-22
Very long instruction word (VLIW) computer having efficient instruction code format
Grant 5,805,850 - Luick September 8, 1
1998-09-08
System for restoring register data in a pipelined data processing system using register file save/restore mechanism
Grant 5,793,944 - Luick August 11, 1
1998-08-11

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