loadpatents
name:-0.060074806213379
name:-0.055354118347168
name:-0.0010221004486084
Luick; David A. Patent Filings

Luick; David A.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Luick; David A..The latest application filed is for "predicated issue for conditional branch instructions".

Company Profile
0.56.79
  • Luick; David A. - Rochester MN US
  • Luick; David A - Rochester MN
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Scheduling instructions in a cascaded delayed execution pipeline to minimize pipeline stalls caused by a cache miss
Grant 8,812,822 - Luick August 19, 2
2014-08-19
Cascaded delayed float/vector execution pipeline
Grant 8,756,404 - Luick June 17, 2
2014-06-17
Cache line use history based done bit modification to D-cache replacement scheme
Grant 8,429,350 - Luick April 23, 2
2013-04-23
Cache line use history based done bit modification to I-cache replacement scheme
Grant 8,332,587 - Luick December 11, 2
2012-12-11
Predicated issue for conditional branch instructions
Grant 8,301,871 - Luick October 30, 2
2012-10-30
Cache line use history based done bit modification to D-cache replacement scheme
Grant 8,291,169 - Luick October 16, 2
2012-10-16
Predicated Issue For Conditional Branch Instructions
App 20120210107 - Luick; David A.
2012-08-16
Cache Line Use History Based Done Bit Modification To D-cache Replacement Scheme
App 20120159075 - Luick; David A.
2012-06-21
D-cache line use history based done bit based on successful prefetchable counter
Grant 8,171,224 - Luick May 1, 2
2012-05-01
I-cache line use history based done bit based on successful prefetchable counter
Grant 8,140,760 - Luick March 20, 2
2012-03-20
Vector morphing mechanism for multiple processor cores
Grant 8,135,941 - Luick March 13, 2
2012-03-13
System and method for a group priority issue schema for a cascaded pipeline
Grant 8,108,654 - Bradford , et al. January 31, 2
2012-01-31
System and method for optimization within a group priority issue schema for a cascaded pipeline
Grant 8,095,779 - Luick January 10, 2
2012-01-10
3-dimensional L2/L3 cache array to hide translation (TLB) delays
Grant 8,019,968 - Luick September 13, 2
2011-09-13
Self prefetching L3/L4 cache mechanism
Grant 8,019,969 - Luick September 13, 2
2011-09-13
System and method for optimization within a group priority issue schema for a cascaded pipeline
Grant 7,996,654 - Luick August 9, 2
2011-08-09
Multiport execution target delay queue FIFO array
Grant 7,996,655 - Luick August 9, 2
2011-08-09
System and method for prioritizing arithmetic instructions
Grant 7,984,270 - Luick July 19, 2
2011-07-19
Single shared instruction predecoder for supporting multiple processors
Grant 7,945,763 - Luick May 17, 2
2011-05-17
Local and global branch prediction information storage
Grant 7,941,654 - Luick May 10, 2
2011-05-10
System and method for the scheduling of load instructions within a group priority issue schema for a cascaded pipeline
Grant 7,882,335 - Luick February 1, 2
2011-02-01
System and method for prioritizing compare instructions
Grant 7,877,579 - Luick January 25, 2
2011-01-25
System and method for prioritizing branch instructions
Grant 7,870,368 - Luick January 11, 2
2011-01-11
System and method for prioritizing store instructions
Grant 7,865,700 - Luick January 4, 2
2011-01-04
Method and apparatus to extend the number of instruction bits in processors with fixed length instructions, in a manner compatible with existing code
Grant 7,865,699 - Altman , et al. January 4, 2
2011-01-04
Cache Line Use History Based Done Bit Modification To D-cache Replacement Scheme
App 20100306473 - Luick; David A.
2010-12-02
D-cache Line Use History Based Done Bit Based On Successful Prefetchable Counter
App 20100306471 - Luick; David A.
2010-12-02
Cache Line Use History Based Done Bit Modification To I-cache Replacement Scheme
App 20100306474 - Luick; David A.
2010-12-02
I-cache Line Use History Based Done Bit Based On Successful Prefetchable Counter
App 20100306472 - Luick; David A.
2010-12-02
Simple load and store disambiguation and scheduling at predecode
Grant 7,730,283 - Luick June 1, 2
2010-06-01
Multiple Processor Core Vector Morph Coupling Mechanism
App 20100077177 - Luick; David A.
2010-03-25
Minimizing unscheduled D-cache miss pipeline stalls in a cascaded delayed execution pipeline
Grant 7,676,656 - Luick March 9, 2
2010-03-09
Multiport Execution Target Delay Queue Fifo Array
App 20090265527 - Luick; David A.
2009-10-22
D-cache miss prediction and scheduling
Grant 7,594,078 - Luick September 22, 2
2009-09-22
System and Method for Optimization Within a Group Priority Issue Schema for a Cascaded Pipeline
App 20090210677 - Luick; David A.
2009-08-20
System and Method for Prioritizing Floating-Point Instructions
App 20090210669 - Luick; David A.
2009-08-20
System and Method for Issue Schema for a Cascaded Pipeline
App 20090210664 - Luick; David A.
2009-08-20
System and Method for Prioritizing Store Instructions
App 20090210671 - Luick; David A.
2009-08-20
System and Method for Prioritizing Branch Instructions
App 20090210674 - Luick; David A.
2009-08-20
System and Method for Resolving Issue Conflicts of Load Instructions
App 20090210666 - Luick; David A.
2009-08-20
System and Method for Prioritizing Arithmetic Instructions
App 20090210670 - Luick; David A.
2009-08-20
System and Method for a Group Priority Issue Schema for a Cascaded Pipeline
App 20090210665 - Bradford; Jeffrey P. ;   et al.
2009-08-20
System and Method for Resolving Issue Conflicts of Load Instructions
App 20090210672 - Luick; David A.
2009-08-20
System and Method for the Scheduling of Load Instructions Within a Group Priority Issue Schema for a Cascaded Pipeline
App 20090210676 - Luick; David A.
2009-08-20
Self Prefetching L3/L4 Cache Mechanism
App 20090210625 - Luick; David A.
2009-08-20
System and Method for Prioritizing Compare Instructions
App 20090210673 - Luick; David A.
2009-08-20
3-Dimensional L2/L3 Cache Array to Hide Translation (TLB) Delays
App 20090210624 - Luick; David A.
2009-08-20
System and Method for Optimization Within a Group Priority Issue Schema for a Cascaded Pipeline
App 20090210667 - Luick; David A.
2009-08-20
System and Method for Optimization Within a Group Priority Issue Schema for a Cascaded Pipeline
App 20090210668 - Luick; David A.
2009-08-20
Butterfly Physical Chip Floorplan to Allow an ILP Core Polymorphism Pairing
App 20090204787 - Luick; David A.
2009-08-13
Compound Instruction Group Formation and Execution
App 20090204791 - Luick; David A.
2009-08-13
Scalar Processor Instruction Level Parallelism (ILP) Coupled Pair Morph Mechanism
App 20090204792 - Luick; David A.
2009-08-13
Local And Global Branch Prediction Information Storage
App 20090138690 - Luick; David A.
2009-05-28
Local and global branch prediction information storage
Grant 7,487,340 - Luick February 3, 2
2009-02-03
Design Structure For L2 Cache/nest Address Translation
App 20090006754 - LUICK; DAVID A.
2009-01-01
Simple load and store disambiguation and scheduling at predecode
Grant 7,461,238 - Luick December 2, 2
2008-12-02
Multiple parallel pipeline processor having self-repairing capability
Grant 7,454,654 - Luick November 18, 2
2008-11-18
Mechanism To Minimize Unscheduled D-cache Miss Pipeline Stalls
App 20080276079 - LUICK; DAVID A.
2008-11-06
Simple Load And Store Disambiguation And Scheduling At Predecode
App 20080276075 - Luick; David A.
2008-11-06
Simple Load And Store Disambiguation And Scheduling At Predecode
App 20080276074 - LUICK; DAVID A.
2008-11-06
Scheduling instructions in a cascaded delayed execution pipeline to minimize pipeline stalls caused by a cache miss
Grant 7,447,879 - Luick November 4, 2
2008-11-04
Structure For Self Prefetching L2 Cache Mechanism For Instruction Lines
App 20080162907 - LUICK; DAVID A.
2008-07-03
Structure For A Cascaded Delayed Execution Pipeline
App 20080162894 - LUICK; DAVID A.
2008-07-03
Design Structure For A Mechanism To Minimize Unscheduled D-cache Miss Pipeline Stalls
App 20080162895 - Luick; David A.
2008-07-03
Design Structure For Self Prefetching L2 Cache Mechanism For Data Lines
App 20080162819 - LUICK; DAVID A.
2008-07-03
Structure For Early Conditional Branch Resolution
App 20080162908 - LUICK; DAVID A.
2008-07-03
Design Structure For Double-width Instruction Queue For Instruction Execution
App 20080162905 - LUICK; DAVID A.
2008-07-03
Single Shared Instruction Predecoder for Supporting Multiple Processors
App 20080148089 - Luick; David A.
2008-06-19
Low Cost Persistent Instruction Predecoded Issue and Dispatcher
App 20080148020 - Luick; David A.
2008-06-19
Cascaded Delayed Execution Pipeline
App 20080141252 - Luick; David A.
2008-06-12
Store-Through L2 Cache Mode
App 20080140934 - Luick; David A.
2008-06-12
Cascaded Delayed Float/Vector Execution Pipeline
App 20080141253 - Luick; David A.
2008-06-12
Method And Apparatus To Extend The Number Of Instruction Bits In Processors With Fixed Length Instructions, In A Manner Compatible With Existing Code
App 20080065861 - Altman; Erik R. ;   et al.
2008-03-13
Extending the number of instruction bits in processors with fixed length instructions, in a manner compatible with existing code
Grant 7,340,588 - Altman , et al. March 4, 2
2008-03-04
Adaptive Thread Id Cache Mechanism For Autonomic Performance Tuning
App 20080010393 - Luick; David A.
2008-01-10
Double-Width Instruction Queue for Instruction Execution
App 20070288734 - Luick; David A.
2007-12-13
Simple Load and Store Disambiguation and Scheduling at Predecode
App 20070288726 - Luick; David A.
2007-12-13
A Fast and Inexpensive Store-Load Conflict Scheduling and Forwarding Mechanism
App 20070288725 - Luick; David A.
2007-12-13
Apparatus and Method for Efficient Handling of Mostly Read Data in a Computer Server
App 20070288524 - Luick; David A.
2007-12-13
Hybrid Branch Prediction Scheme
App 20070288732 - Luick; David A.
2007-12-13
Predicated Issue for Conditional Branch Instructions
App 20070288730 - Luick; David A.
2007-12-13
Local and Global Branch Prediction Information Storage
App 20070288736 - Luick; David A.
2007-12-13
Dual Path Issue for Conditional Branch Instructions
App 20070288731 - Bradford; Jeffrey P. ;   et al.
2007-12-13
Early Conditional Branch Resolution
App 20070288733 - Luick; David A.
2007-12-13
Adaptive thread ID cache mechanism for autonomic performance tuning
Grant 7,302,524 - Luick November 27, 2
2007-11-27
Completion table configured to track a larger number of outstanding instructions without increasing the size of the completion table
Grant 7,278,011 - Eisen , et al. October 2, 2
2007-10-02
Runtime repairable processor
Grant 7,266,721 - Luick September 4, 2
2007-09-04
Self prefetching L2 cache mechanism for instruction lines
App 20070186049 - Luick; David A.
2007-08-09
D-cache miss prediction and scheduling
App 20070186073 - Luick; David A.
2007-08-09
Self prefetching L2 cache mechanism for data lines
App 20070186050 - Luick; David A.
2007-08-09
Mechanism to minimize unscheduled D-cache miss pipeline stalls
App 20070186080 - Luick; David A.
2007-08-09
Adaptive memory compression
Grant 7,188,227 - Luick March 6, 2
2007-03-06
Automatic temporary precision reduction for enhanced compression
Grant 7,188,130 - Luick March 6, 2
2007-03-06
Processor power and energy management
Grant 7,174,469 - Luick February 6, 2
2007-02-06
Floating point unit power reduction via inhibiting register file write during tight loop execution
Grant 7,085,940 - Luick August 1, 2
2006-08-01
Methods and arrangements for repairing ports
Grant 7,085,966 - Luick August 1, 2
2006-08-01
Multiply-sum dot product instruction with mask and splat
App 20060149804 - Luick; David A. ;   et al.
2006-07-06
Method and system for reducing power consumption in a computing device when the computing device executes instructions in a tight loop
Grant 6,993,668 - Luick January 31, 2
2006-01-31
Effectively infinite branch prediction table mechanism
Grant 6,978,361 - Luick December 20, 2
2005-12-20
Fixed point unit power reduction mechanism for superscalar loop execution
Grant 6,963,988 - Luick November 8, 2
2005-11-08
Completion table configured to track a larger number of outstanding instructions
App 20050228972 - Eisen, Susan E. ;   et al.
2005-10-13
Power reduction mechanism for floating point register file reads
Grant 6,934,831 - Luick August 23, 2
2005-08-23
Floating point unit power reduction scheme
Grant 6,922,714 - Luick July 26, 2
2005-07-26
System for allowing only a partial value prediction field/cache size
Grant 6,922,767 - Luick , et al. July 26, 2
2005-07-26
Icache-based value prediction mechanism
Grant 6,910,104 - Luick June 21, 2
2005-06-21
Method and apparatus to extend the number of instruction bits in processors with fixed length instructions, in a manner compatible with existing code
App 20050114629 - Altman, Erik R. ;   et al.
2005-05-26
Pipeline recirculation for data misprediction in a fast-load data cache
App 20050097304 - Luick, David A.
2005-05-05
Methods and arrangements for repairing ports
App 20050081124 - Luick, David A.
2005-04-14
Reduction of cache miss rates using shared private caches
App 20050071564 - Luick, David A.
2005-03-31
Adaptive memory compression
App 20050071579 - Luick, David A.
2005-03-31
Runtime repairable processor
App 20050071406 - Luick, David A.
2005-03-31
Processor power and energy management
App 20050071701 - Luick, David A.
2005-03-31
Adaptive thread ID cache mechanism for autonomic performance tuning
App 20050071535 - Luick, David A.
2005-03-31
Automatic temporary precision reduction for enhanced compression
App 20050071598 - Luick, David A.
2005-03-31
Dual array read port functionality from a one port SRAM
Grant 6,868,033 - Luick , et al. March 15, 2
2005-03-15
Directoryless L0 cache for stall reduction
Grant 6,823,430 - Luick November 23, 2
2004-11-23
System for allowing only a partial value prediction field/cache size
App 20040083349 - Luick, David A. ;   et al.
2004-04-29
Cache updating in multiprocessor systems
Grant 6,728,842 - Brown , et al. April 27, 2
2004-04-27
Directoryless L0 cache for stall reduction
App 20040073753 - Luick, David A.
2004-04-15
Icache-based value prediction mechanism
App 20040059891 - Luick, David A.
2004-03-25
Effectively infinite branch prediction table mechanism
App 20040059899 - Luick, David A.
2004-03-25
Dual array read port functionality from a one port SRAM
App 20040017727 - Luick, David A. ;   et al.
2004-01-29
Icache and general array power reduction method for loops
App 20040003298 - Luick, David A.
2004-01-01
Fixed point unit power reduction mechanism for superscalar loop execution
App 20040003308 - Luick, David A.
2004-01-01
Power reduction mechanism for floating point register file reads
App 20030212880 - Luick, David A.
2003-11-13
Floating point unit power reduction scheme
App 20030212726 - Luick, David A.
2003-11-13
Register file write power reduction mechanism
App 20030212915 - Luick, David A.
2003-11-13
Cache updating in multiprocessor systems
App 20030149846 - Brown, Jeffrey D. ;   et al.
2003-08-07
Moving data in and out of processor units using idle register/storage functional units
Grant 6,223,208 - Kiefer , et al. April 24, 2
2001-04-24
Method and apparatus for reordering memory operations in a superscalar or very long instruction word processor
Grant 5,625,835 - Ebcioglu , et al. April 29, 1
1997-04-29
Extended control word decoding
Grant 4,488,219 - Lemaire , et al. December 11, 1
1984-12-11
System for interfacing between main store memory and a central processor
Grant 4,258,417 - Berglund , et al. March 24, 1
1981-03-24

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