loadpatents
name:-0.028273820877075
name:-0.026962041854858
name:-0.0099120140075684
Lu; Yu-Te Patent Filings

Lu; Yu-Te

Patent Applications and Registrations

Patent applications and USPTO patent grants for Lu; Yu-Te.The latest application filed is for "method for manufacturing multi-layer circuit board capable of being applied with electrical testing".

Company Profile
7.21.27
  • Lu; Yu-Te - Taoyuan TW
  • Lu; Yu-Te - Taoyuan City TW
  • Lu; Yu-Te - Taoyuan County TW
  • Lu; Yu-Te - Taoyuan Hsien TW
  • LU; YU-TE - TAOYUAN COUNTY 327 TW
  • Lu, Yu Te - Hsin-Chu TW
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Method for manufacturing multi-layer circuit board capable of being applied with electrical testing
Grant 11,044,806 - Liu , et al. June 22, 2
2021-06-22
Method For Manufacturing Multi-layer Circuit Board Capable Of Being Applied With Electrical Testing
App 20200128662 - Liu; Chin-Kuan ;   et al.
2020-04-23
Multi-layer circuit board capable of being applied with electrical testing and method for manufacturing the same
Grant 10,548,214 - Liu , et al. Ja
2020-01-28
Method for manufacturing a multi-layer circuit board capable of being applied with electrical testing
Grant 10,455,694 - Liu , et al. Oc
2019-10-22
Method For Manufacturing A Multi-layer Circuit Board Capable Of Being Applied With Electrical Testing
App 20190269008 - Liu; Chin-Kuan ;   et al.
2019-08-29
Multi-layer circuit board capable of being applied with electrical testing and method for manufacturing the same
Grant 10,334,719 - Liu , et al.
2019-06-25
Multi-layer Circuit Board Capable Of Being Applied With Electrical Testing And Method For Manufacturing The Same
App 20190059153 - Liu; Chin-Kuan ;   et al.
2019-02-21
Multi-layer Circuit Board Capable Of Being Applied With Electrical Testing And Method For Manufacturing The Same
App 20190059154 - Liu; Chin-Kuan ;   et al.
2019-02-21
Compound Carrier Board Structure Of Flip-chip Chip-scale Package And Manufacturing Method Thereof
App 20170345748 - LIN; TING-HAO ;   et al.
2017-11-30
Compound carrier board structure of flip-chip chip-scale package and manufacturing method thereof
Grant 9,831,167 - Lin , et al. November 28, 2
2017-11-28
Compound carrier board structure of flip-chip chip-scale package and manufacturing method thereof
Grant 9,754,870 - Lin , et al. September 5, 2
2017-09-05
Compound carrier board structure of flip-chip chip-scale package and manufacturing method thereof
Grant 9,406,641 - Lin , et al. August 2, 2
2016-08-02
Compound Carrier Board Structure Of Flip-chip Chip-scale Package And Manufacturing Method Thereof
App 20160197033 - LIN; TING-HAO ;   et al.
2016-07-07
Method of manufacturing a multilayer substrate structure for fine line
Grant 9,370,110 - Lin , et al. June 14, 2
2016-06-14
Method for manufacturing microthrough-hole in circuit board and circuit board structure with microthrough-hole
Grant 9,301,405 - Lin , et al. March 29, 2
2016-03-29
Double sided board with buried element and method for manufacturing the same
Grant 9,198,296 - Lin , et al. November 24, 2
2015-11-24
Multilayer Substrate Structure For Fine Line
App 20150282306 - Lin; Ting-Hao ;   et al.
2015-10-01
Method Of Manufacturing A Multilayer Substrate Structure For Fine Line
App 20150282333 - Lin; Ting-Hao ;   et al.
2015-10-01
Method of manufacturing a stacked multilayer structure
Grant 9,095,085 - Lin , et al. July 28, 2
2015-07-28
Stacked multilayer structure
Grant 9,095,084 - Lin , et al. July 28, 2
2015-07-28
Package structure of a chip and a substrate
Grant 8,941,224 - Lin , et al. January 27, 2
2015-01-27
Compound Carrier Board Structure Of Flip-chip Chip-scale Package And Manufacturing Method Thereof
App 20150014031 - LIN; TING-HAO ;   et al.
2015-01-15
Method of manufacturing a chip support board structure
Grant 8,887,386 - Lin , et al. November 18, 2
2014-11-18
Method of manufacturing a laminate circuit board
Grant 8,875,390 - Lin , et al. November 4, 2
2014-11-04
Method Of Manufacturing A Stacked Multilayer Structure
App 20140290057 - Lin; Ting-Hao ;   et al.
2014-10-02
Stacked Multilayer Structure
App 20140290983 - Lin; Ting-Hao ;   et al.
2014-10-02
Package Structure Of A Chip And A Substrate
App 20140291853 - Lin; Ting-Hao ;   et al.
2014-10-02
Method Of Packaging A Chip And A Substrate
App 20140295623 - Lin; Ting-Hao ;   et al.
2014-10-02
Chip support board structure
Grant 8,766,102 - Lin , et al. July 1, 2
2014-07-01
Chip Support Board Structure
App 20140116757 - Lin; Ting-Hao ;   et al.
2014-05-01
Method Of Manufacturing A Laminate Circuit Board
App 20140115889 - Lin; Ting-Hao ;   et al.
2014-05-01
Method Of Manufacturing A Chip Support Board Structure
App 20140115888 - Lin; Ting-Hao ;   et al.
2014-05-01
Laminate Circuit Board Structure
App 20140116755 - Lin; Ting-Hao ;   et al.
2014-05-01
Method of fabricating board having high density core layer and structure thereof
Grant 8,186,054 - Chang , et al. May 29, 2
2012-05-29
Method for fabricating an interlayer conducting structure of an embedded circuitry
Grant 8,161,639 - Chang , et al. April 24, 2
2012-04-24
Method for fabricating component-embedded printed circuit board
Grant 8,083,954 - Chang , et al. December 27, 2
2011-12-27
Method For Fabricating An Interlayer Conducting Structure Of An Embedded Circuitry
App 20110083323 - Chang; Chien-Wei ;   et al.
2011-04-14
Component-Embedded Printed Circuit Board
App 20110048777 - Chang; Chien-Wei ;   et al.
2011-03-03
Method of fabricating board having high density core layer and structure thereof
Grant 7,875,809 - Chang , et al. January 25, 2
2011-01-25
Method for fabricating buried capacitor structure
Grant 7,871,892 - Chang , et al. January 18, 2
2011-01-18
Method For Fabricating Buried Capacitor Structure
App 20100307666 - Chang; Chien-Wei ;   et al.
2010-12-09
Buried Capacitor Structure
App 20100309608 - Chang; Chien-Wei ;   et al.
2010-12-09
Stack structure with copper bumps
App 20100283145 - Chang; Chien-Wei ;   et al.
2010-11-11
Method Of Fabricating Board Having High Density Core Layer And Structure Thereof
App 20100170088 - Chang; Chien-Wei ;   et al.
2010-07-08
Method Of Selectively Plating Without Plating Lines
App 20100075495 - Chang; Chien-Wei ;   et al.
2010-03-25
Non-Plating Line Plating Method Using Current Transmitted From Ball Side
App 20100075497 - Chang; Chien-Wei ;   et al.
2010-03-25
Method Of Fabricating Board Having High Density Core Layer And Structure Thereof
App 20080314622 - Chang; Chien-Wei ;   et al.
2008-12-25
Image-sensing device for auto-judging exposure time
App 20040169744 - Lu, Yu Te ;   et al.
2004-09-02

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