loadpatents
name:-0.0010499954223633
name:-0.016752004623413
name:-0.00052499771118164
Lu; Nicky C. Patent Filings

Lu; Nicky C.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Lu; Nicky C..The latest application filed is for "high performance dram structure employing multiple thickness gate oxide".

Company Profile
0.18.0
  • Lu; Nicky C. - Palo Alto CA
  • Lu; Nicky C. - Yorktown Heights NY
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
High performance DRAM structure employing multiple thickness gate oxide
Grant 6,107,134 - Lu , et al. August 22, 2
2000-08-22
High performance DRAM structure employing multiple thickness gate oxide
Grant 6,009,023 - Lu , et al. December 28, 1
1999-12-28
Trench-capacitor-one-transistor storage cell and array for dynamic random access memories
Grant 5,198,995 - Dennard , et al. March 30, 1
1993-03-30
Method of fabricating cross-point lightly-doped drain-source trench transistor
Grant 5,021,355 - Dhong , et al. June 4, 1
1991-06-04
Silicide bridge contact process
Grant 4,983,544 - Lu , et al. January 8, 1
1991-01-08
Wordline voltage boosting circuits for complementary MOSFET dynamic memories
Grant 4,954,731 - Dhong , et al. September 4, 1
1990-09-04
Complementary metal-oxide-semiconductor transistor and one-capacitor dynamic-random-access memory cell and fabrication process therefor
Grant 4,927,779 - Dhong , et al. May 22, 1
1990-05-22
Boost clock circuit for driving redundant wordlines and sample wordlines
Grant 4,922,128 - Dhong , et al. May 1, 1
1990-05-01
Complementary metal-oxide-semiconductor transistor and one-capacitor dynamic-random-access memory cell
Grant 4,910,709 - Dhong , et al. March 20, 1
1990-03-20
Integrated trench-transistor structure and fabrication process
Grant 4,881,105 - Davari , et al. November 14, 1
1989-11-14
High density memory cell structure having a vertical trench transistor self-aligned with a vertical trench capacitor and fabrication methods therefor
Grant 4,833,516 - Hwang , et al. May 23, 1
1989-05-23
High density vertical trench transistor and capacitor memory cell structure and fabrication method therefor
Grant 4,816,884 - Hwang , et al. March 28, 1
1989-03-28
Dynamic ram having multiplexed twin I/O line pairs
Grant 4,754,433 - Chin , et al. June 28, 1
1988-06-28
Fabrication method for forming a self-aligned contact window and connection in an epitaxial layer and device structures employing the method
Grant 4,728,623 - Lu , et al. March 1, 1
1988-03-01
Dynamic ram cell with MOS trench capacitor in CMOS
Grant 4,688,063 - Lu , et al. August 18, 1
1987-08-18
Boost word-line clock and decoder-driver circuits in semiconductor memories
Grant 4,678,941 - Chao , et al. July 7, 1
1987-07-07
Dynamic memory device having a single-crystal transistor on a trench capacitor structure and a fabrication method therefor
Grant 4,649,625 - Lu March 17, 1
1987-03-17
Boosting word-line clock circuit for semiconductor memory
Grant 4,639,622 - Goodwin , et al. January 27, 1
1987-01-27

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