| Patent | Date |
|---|
Detrapping Electrons To Prevent Quick Charge Loss During Program Verify Operations In A Memory Device
App 20220199175 - Lu; Ching-Huang ; et al. | 2022-06-23 |
Enhanced Gradient Seeding Scheme During A Program Operation In A Memory Sub-system
App 20220189555 - Diep; Vinh Q. ; et al. | 2022-06-16 |
Modified verify scheme for programming a memory apparatus
Grant 11,244,734 - Baraskar , et al. February 8, 2 | 2022-02-08 |
Bonded three-dimensional memory devices and methods of making the same by replacing carrier substrate with source layer
Grant 11,195,857 - Kai , et al. December 7, 2 | 2021-12-07 |
Non-volatile memory with silicided bit line contacts
Grant 11,183,509 - Lu , et al. November 23, 2 | 2021-11-23 |
Modified Verify Scheme For Programming A Memory Apparatus
App 20210202022 - Baraskar; Ashish ; et al. | 2021-07-01 |
Multi-pass programming process for memory device which omits verify test in first program pass
Grant 11,037,640 - Baraskar , et al. June 15, 2 | 2021-06-15 |
Memory device with compensation for program speed variations due to block oxide thinning
Grant 11,024,387 - Lu , et al. June 1, 2 | 2021-06-01 |
Method Of Reducing Neighboring Word-line Interference
App 20210104280 - Lee; Sung-Chul ; et al. | 2021-04-08 |
Memory Device With Compensation For Program Speed Variations Due To Block Oxide Thinning
App 20210082515 - Lu; Ching-Huang ; et al. | 2021-03-18 |
Three-dimensional memory device with drain-select-level isolation structures and method of making the same
Grant 10,943,917 - Iwai , et al. March 9, 2 | 2021-03-09 |
Memory device with compensation for erase speed variations due to blocking oxide layer thinning
Grant 10,923,197 - Lu , et al. February 16, 2 | 2021-02-16 |
Non-Volatile Memory With Silicided Bit Line Contacts
App 20200411537 - LU; Ching-Huang ; et al. | 2020-12-31 |
Memory device with compensation for program speed variations due to block oxide thinning
Grant 10,878,914 - Lu , et al. December 29, 2 | 2020-12-29 |
Multi-state programming in memory device with loop-dependent bit line voltage during verify
Grant 10,854,300 - Lu , et al. December 1, 2 | 2020-12-01 |
Memory Device With Compensation For Erase Speed Variations Due To Blocking Oxide Layer Thinning
App 20200335168 - Lu; Ching-Huang ; et al. | 2020-10-22 |
Multi-pass programming process for memory device which omits verify test in first program pass
Grant 10,811,109 - Baraskar , et al. October 20, 2 | 2020-10-20 |
Three-dimensional memory devices using carbon-doped aluminum oxide backside blocking dielectric layer for etch resistivity enhancement and methods of making the same
Grant 10,804,282 - Baraskar , et al. October 13, 2 | 2020-10-13 |
Multi-pass Programming Process For Memory Device Which Omits Verify Test In First Program Pass
App 20200312414 - Baraskar; Ashish ; et al. | 2020-10-01 |
Multi-state Programming In Memory Device With Loop-dependent Bit Line Voltage During Verify
App 20200312410 - Lu; Ching-Huang ; et al. | 2020-10-01 |
Suppressing program disturb during program recovery in memory device
Grant 10,762,973 - Lu , et al. Sep | 2020-09-01 |
Memory Device With Compensation For Erase Speed Variations Due To Blocking Oxide Layer Thinning
App 20200265897 - Lu; Ching-Huang ; et al. | 2020-08-20 |
Bonded Three-dimensional Memory Devices And Methods Of Making The Same By Replacing Carrier Substrate With Source Layer
App 20200258904 - A1 | 2020-08-13 |
Three-dimensional Memory Devices Using Carbon-doped Aluminum Oxide Backside Blocking Dielectric Layer For Etch Resistivity Enhan
App 20200258896 - A1 | 2020-08-13 |
Memory device with compensation for erase speed variations due to blocking oxide layer thinning
Grant 10,741,253 - Lu , et al. A | 2020-08-11 |
Three-dimensional Memory Device With Drain-select-level Isolation Structures And Method Of Making The Same
App 20200251488 - Kind Code | 2020-08-06 |
Memory Device With Compensation For Program Speed Variations Due To Block Oxide Thinning
App 20200243141 - Lu; Ching-Huang ; et al. | 2020-07-30 |
Multi-state programming in memory device with loop-dependent bit line voltage during verify
Grant 10,706,941 - Lu , et al. | 2020-07-07 |
Multi-pass Programming Process For Memory Device Which Omits Verify Test In First Program Pass
App 20200211663 - Baraskar; Ashish ; et al. | 2020-07-02 |
Non-volatile memory with silicided bit line contacts
Grant 10,692,877 - Lu , et al. | 2020-06-23 |
Three-dimensional memory device with drain-select-level isolation structures and method of making the same
Grant 10,685,979 - Lu , et al. | 2020-06-16 |
Three-dimensional memory device with drain-select-level isolation structures and method of making the same
Grant 10,685,978 - Lu , et al. | 2020-06-16 |
Detecting short circuit between word line and source line in memory device and recovery method
Grant 10,665,313 - Lu , et al. | 2020-05-26 |
Memory device with compensation for program speed variations due to block oxide thinning
Grant 10,665,301 - Lu , et al. | 2020-05-26 |
Memory device with channel discharge before program-verify based on data state and sub-block position
Grant 10,665,299 - Lu , et al. | 2020-05-26 |
Memory device with reduced neighbor word line interference using adjustable voltage on source-side unselected word line
Grant 10,636,501 - Chen , et al. | 2020-04-28 |
Bonded three-dimensional memory devices and methods of making the same by replacing carrier substrate with source layer
Grant 10,629,616 - Kai , et al. | 2020-04-21 |
Two-stage ramp up of word line voltages in memory device to suppress read disturb
Grant 10,629,272 - Lu , et al. | 2020-04-21 |
Three dimensional NAND memory device with drain select gate electrode shared between multiple strings
Grant 10,566,059 - Diep , et al. Feb | 2020-02-18 |
Read bias adjustment for compensating threshold voltage shift due to lateral charge movement
Grant 10,541,035 - Lu , et al. Ja | 2020-01-21 |
Read Bias Adjustment For Compensating Threshold Voltage Shift Due To Lateral Charge Movement
App 20200005878 - Lu; Ching-Huang ; et al. | 2020-01-02 |
Multi-pass programming with modified pass voltages to tighten threshold voltage distributions
Grant 10,510,413 - Diep , et al. Dec | 2019-12-17 |
Preventing refresh of voltages of dummy memory cells to reduce threshold voltage downshift for select gate transistors
Grant 10,482,981 - Lu , et al. Nov | 2019-11-19 |
Three Dimensional Nand Memory Device With Drain Select Gate Electrode Shared Between Multiple Strings
App 20190333581 - DIEP; Vinh ; et al. | 2019-10-31 |
Adjusting voltage on adjacent word line during verify of memory cells on selected word line in multi-pass programming
Grant 10,446,244 - Diep , et al. Oc | 2019-10-15 |
Adjusting Voltage On Adjacent Word Line During Verify Of Memory Cells On Selected Word Line In Multi-pass Programming
App 20190311772 - Diep; Vinh ; et al. | 2019-10-10 |
Preventing Refresh Of Voltages Of Dummy Memory Cells To Reduce Threshold Voltage Downshift For Select Gate Transistors
App 20190259462 - Lu; Ching-Huang ; et al. | 2019-08-22 |
Programming Dummy Memory Cells In Erase Operation To Reduce Threshold Voltage Downshift For Select Gate Transistors
App 20190252029 - Lai; Chun-Hung ; et al. | 2019-08-15 |
Programming dummy memory cells in erase operation to reduce threshold voltage downshift for select gate transistors
Grant 10,373,697 - Lai , et al. | 2019-08-06 |
Buried Trench Isolation in Integrated Circuits
App 20190198611 - Sugino; Rinji ; et al. | 2019-06-27 |
Early ramp down of dummy word line voltage during read to suppress select gate transistor downshift
Grant 10,276,248 - Lu , et al. | 2019-04-30 |
Self-aligned trench isolation in integrated circuits
Grant 10,256,137 - Lu , et al. | 2019-04-09 |
Reducing hot electron injection type of read disturb in 3D memory device during signal switching transients
Grant 10,249,372 - Chen , et al. | 2019-04-02 |
Pre-read voltage pulse for first read error handling
Grant 10,235,294 - Lu , et al. | 2019-03-19 |
Reducing Hot Electron Injection Type Of Read Disturb In 3D Memory Device During Signal Switching Transients
App 20190074062 - Chen; Hong-Yan ; et al. | 2019-03-07 |
Non-volatile memory with methods to reduce creep-up field between dummy control gate and select gate
Grant 10,204,689 - Lu , et al. Feb | 2019-02-12 |
Non-volatile Memory With Methods To Reduce Creep-Up Field Between Dummy Control Gate And Select Gate
App 20190035480 - Lu; Ching-Huang ; et al. | 2019-01-31 |
Reducing charge loss in data memory cell adjacent to dummy memory cell
Grant 10,121,552 - Baraskar , et al. November 6, 2 | 2018-11-06 |
Charge storage region in non-volatile memory
Grant 10,115,737 - Cho , et al. October 30, 2 | 2018-10-30 |
Electric field to reduce select gate threshold voltage shift
Grant 10,115,464 - Lu , et al. October 30, 2 | 2018-10-30 |
Reducing Charge Loss In Data Memory Cell Adjacent To Dummy Memory Cell
App 20180308556 - Baraskar; Ashish ; et al. | 2018-10-25 |
Channel pre-charge to suppress disturb of select gate transistors during erase in memory
Grant 10,068,651 - Diep , et al. September 4, 2 | 2018-09-04 |
Forming memory cell film in stack opening
Grant 10,020,314 - Baraskar , et al. July 10, 2 | 2018-07-10 |
Programming of dummy memory cell to reduce charge loss in select gate transistor
Grant 10,008,271 - Diep , et al. June 26, 2 | 2018-06-26 |
Non-volatile Memory With Reduced Variations In Gate Resistance
App 20180175054 - Baraskar; Ashish ; et al. | 2018-06-21 |
Self-aligned Trench Isolation In Integrated Circuits
App 20180166323 - LU; Ching-Huang ; et al. | 2018-06-14 |
Charge Storage Region In Non-volatile Memory
App 20180166463 - Cho; Hoon ; et al. | 2018-06-14 |
Charge storage region in non-volatile memory
Grant 9,899,410 - Cho , et al. February 20, 2 | 2018-02-20 |
Non-volatile Memory With Reduced Variations In Gate Resistance
App 20180033798 - Baraskar; Ashish ; et al. | 2018-02-01 |
Dummy word line control scheme for non-volatile memory
Grant 9,852,803 - Diep , et al. December 26, 2 | 2017-12-26 |
Word Line-dependent And Temperature-dependent Erase Depth
App 20170345470 - Pang; Liang ; et al. | 2017-11-30 |
Reducing Neighboring Word Line In Interference Using Low-K Oxide
App 20170345705 - Pang; Liang ; et al. | 2017-11-30 |
Reducing neighboring word line in interference using low-k oxide
Grant 9,831,118 - Pang , et al. November 28, 2 | 2017-11-28 |
Word line-dependent and temperature-dependent erase depth
Grant 9,830,963 - Pang , et al. November 28, 2 | 2017-11-28 |
Self-aligned trench isolation in integrated circuits
Grant 9,831,114 - Lu , et al. November 28, 2 | 2017-11-28 |
Dummy Word Line Control Scheme For Non-volatile Memory
App 20170330631 - Diep; Vinh Quang ; et al. | 2017-11-16 |
Method of fabricating 3D NAND
Grant 9,779,948 - Baraskar , et al. October 3, 2 | 2017-10-03 |
Reducing hot electron injection type of read disturb during read recovery phase in 3D memory
Grant 9,761,320 - Chen , et al. September 12, 2 | 2017-09-12 |
Non-Volatile Memory With Silicided Bit Line Contacts
App 20170250192 - LU; Ching-Huang ; et al. | 2017-08-31 |
Three-dimensional memory device with select transistor having charge trapping gate dielectric layer and methods of making and operating thereof
Grant 9,748,266 - Baraskar , et al. August 29, 2 | 2017-08-29 |
Multi-tier Replacement Memory Stack Structure Integration Scheme
App 20170229472 - LU; Ching-Huang ; et al. | 2017-08-10 |
Multi-tier replacement memory stack structure integration scheme
Grant 9,728,551 - Lu , et al. August 8, 2 | 2017-08-08 |
Method of forming memory cell film
Grant 9,673,216 - Baraskar , et al. June 6, 2 | 2017-06-06 |
Non-volatile memory with silicided bit line contacts
Grant 9,666,591 - Lu , et al. May 30, 2 | 2017-05-30 |
Three-dimensional memory devices having a single layer channel and methods of making thereof
Grant 9,530,785 - Koka , et al. December 27, 2 | 2016-12-27 |
Method of forming a fully wrapped-around shielded PMR writer pole
Grant 9,520,146 - Wang , et al. December 13, 2 | 2016-12-13 |
Fluorine-blocking insulating spacer for backside contact structure of three-dimensional memory structures
Grant 9,443,861 - Pachamuthu , et al. September 13, 2 | 2016-09-13 |
Programming memory with reduced short-term charge loss
Grant 9,437,305 - Lu , et al. September 6, 2 | 2016-09-06 |
Self-aligned trench isolation in integrated circuits
Grant 9,437,470 - Lu , et al. September 6, 2 | 2016-09-06 |
Charge redistribution during erase in charge trapping memory
Grant 9,406,387 - Yuan , et al. August 2, 2 | 2016-08-02 |
Non-Volatile Memory With Silicided Bit Line Contacts
App 20160211271 - LU; Ching-Huang ; et al. | 2016-07-21 |
Buried Trench Isolation in Integrated Circuits
App 20160211321 - Sugino; Rinji ; et al. | 2016-07-21 |
Method to recover cycling damage and improve long term data retention
Grant 9,378,832 - Lu , et al. June 28, 2 | 2016-06-28 |
Method To Recover Cycling Damage And Improve Long Term Data Retention
App 20160172044 - Lu; Ching-Huang ; et al. | 2016-06-16 |
Weak erase after programming to improve data retention in charge-trapping memory
Grant 9,324,439 - Chen , et al. April 26, 2 | 2016-04-26 |
Weak Erase After Programming To Improve Data Retention In Charge-Trapping Memory
App 20160111164 - Chen; Hong-Yan ; et al. | 2016-04-21 |
Programming of drain side word line to reduce program disturb and charge loss
Grant 9,312,010 - Yuan , et al. April 12, 2 | 2016-04-12 |
Programming Of Drain Side Word Line To Reduce Program Disturb And Charge Loss
App 20160099058 - Yuan; Jiahui ; et al. | 2016-04-07 |
Charge Redistribution During Erase In Charge Trapping Memory
App 20160064090 - Yuan; Jiahui ; et al. | 2016-03-03 |
Charge Redistribution During Erase In Charge Trapping Memory
App 20160064087 - Yuan; Jiahui ; et al. | 2016-03-03 |
Programming Memory With Reduced Short-Term Charge Loss
App 20160064084 - Lu; Ching-Huang ; et al. | 2016-03-03 |
Charge redistribution during erase in charge trapping memory
Grant 9,257,191 - Yuan , et al. February 9, 2 | 2016-02-09 |
Buried trench isolation in integrated circuits
Grant 9,252,026 - Sugino , et al. February 2, 2 | 2016-02-02 |
Non-volatile memory with silicided bit line contacts
Grant 9,252,154 - Lu , et al. February 2, 2 | 2016-02-02 |
Programming memory with reduced short-term charge loss
Grant 9,230,663 - Lu , et al. January 5, 2 | 2016-01-05 |
Buried Trench Isolation in Integrated Circuits
App 20150262838 - Sugino; Rinji ; et al. | 2015-09-17 |
Self-aligned Trench Isolation In Integrated Circuits
App 20150097245 - LU; Ching-Huang ; et al. | 2015-04-09 |
Buried Trench Isolation In Integrated Circuits
App 20150097224 - XUE; Lei ; et al. | 2015-04-09 |
Non-Volatile Memory With Silicided Bit Line Contacts
App 20150017795 - Lu; Ching-Huang ; et al. | 2015-01-15 |
Method for providing a monolithic shield for a magnetic recording transducer
Grant 8,914,969 - Zhou , et al. December 23, 2 | 2014-12-23 |
Non-Volatile memory with silicided bit line contacts
Grant 8,866,213 - Lu , et al. October 21, 2 | 2014-10-21 |
Non-Volatile Memory With Silicided Bit Line Contacts
App 20140209993 - LU; Ching-Huang ; et al. | 2014-07-31 |
Method of forming a fully wrapped-around shielded PMR writer pole
Grant 8,533,937 - Wang , et al. September 17, 2 | 2013-09-17 |
Process for masking and removal of residue from complex shapes
Grant 8,518,832 - Yang , et al. August 27, 2 | 2013-08-27 |
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