loadpatents
name:-0.026345014572144
name:-0.033532857894897
name:-0.0026130676269531
Low; Qwai H. Patent Filings

Low; Qwai H.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Low; Qwai H..The latest application filed is for "3d-interconnect".

Company Profile
2.30.20
  • Low; Qwai H. - Cupertino CA
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
3d-Interconnect
App 20210366857 - Chia; Chok J. ;   et al.
2021-11-25
3D-interconnect
Grant 11,031,362 - Chia , et al. June 8, 2
2021-06-08
3D-Interconnect
App 20190148324 - Chia; Chok J. ;   et al.
2019-05-16
3D-interconnect
Grant 10,181,447 - Chia , et al. Ja
2019-01-15
3d-interconnect
App 20180308813 - Chia; Chok J. ;   et al.
2018-10-25
Low cost hybrid high density package
Grant 9,875,955 - Desai , et al. January 23, 2
2018-01-23
Low cost hybrid high density package
App 20170077018 - DESAI; Kishor ;   et al.
2017-03-16
Low cost hybrid high density package
Grant 9,508,687 - Desai , et al. November 29, 2
2016-11-29
Low Cost Hybrid High Density Package
App 20150171058 - Desai; Kishor ;   et al.
2015-06-18
Low cost hybrid high density package
Grant 8,963,310 - Desai , et al. February 24, 2
2015-02-24
Area array quad flat no-lead (QFN) package
Grant 8,525,312 - Low , et al. September 3, 2
2013-09-03
Low Cost Hybrid High Density Package
App 20130049179 - Desai; Kishor ;   et al.
2013-02-28
Area Array Qfn
App 20130037925 - Low; Qwai H. ;   et al.
2013-02-14
Package with power and ground through via
Grant 8,350,379 - Low , et al. January 8, 2
2013-01-08
Heat dissipation for integrated circuit
Grant 8,134,232 - Lohr , et al. March 13, 2
2012-03-13
Wire bonding over active circuits
Grant 8,125,091 - Low February 28, 2
2012-02-28
Package with Power and Ground Through Via
App 20100059865 - Low; Qwai H. ;   et al.
2010-03-11
Heat Dissipation For Integrated Circuit
App 20090250805 - Lohr; Mitchel E. ;   et al.
2009-10-08
Wire Bonding Over Active Circuits
App 20090236742 - Low; Qwai H.
2009-09-24
Heat spreader in integrated circuit package
Grant 7,420,809 - Lim , et al. September 2, 2
2008-09-02
Integrated heatspreader for use in wire bonded ball grid array semiconductor packages
Grant 7,235,889 - Othieno , et al. June 26, 2
2007-06-26
Integrated heatspreader for use in wire bonded ball grid array semiconductor packages
App 20060055029 - Othieno; Maurice O. ;   et al.
2006-03-16
Test structure for detecting bonding-induced cracks
Grant 6,998,638 - Low , et al. February 14, 2
2006-02-14
Heat spreader in integrated circuit package
App 20050281011 - Lim, Hong T. ;   et al.
2005-12-22
Dielectric stack
Grant 6,963,138 - Low , et al. November 8, 2
2005-11-08
Test structure
Grant 6,861,748 - Low , et al. March 1, 2
2005-03-01
Buffer metal layer
Grant 6,861,343 - Chia , et al. March 1, 2
2005-03-01
Slotted bonding pad
Grant 6,825,563 - Ranganathan , et al. November 30, 2
2004-11-30
Test structure for detecting bonding-induced cracks
App 20040217487 - Low, Qwai H. ;   et al.
2004-11-04
Bonding pad for low k dielectric
Grant 6,798,035 - Low , et al. September 28, 2
2004-09-28
Wire bonding to full array bonding pads on active circuitry
App 20040178498 - Low, Qwai H. ;   et al.
2004-09-16
Test structure for detecting bonding-induced cracks
Grant 6,781,150 - Low , et al. August 24, 2
2004-08-24
Dielectric stack
App 20040150069 - Low, Qwai H. ;   et al.
2004-08-05
Bonding pad isolation
Grant 6,743,979 - Berman , et al. June 1, 2
2004-06-01
Test structure
App 20040096995 - Low, Qwai H. ;   et al.
2004-05-20
Buffer metal layer
App 20040072414 - Chia, Chok J. ;   et al.
2004-04-15
Test structure
App 20040043656 - Low, Qwai H. ;   et al.
2004-03-04
Integrated circuit package
Grant 6,603,200 - Low , et al. August 5, 2
2003-08-05
Apparatus and method for stackable molded lead frame ball grid array packaging of integrated circuits
Grant 5,973,393 - Chia , et al. October 26, 1
1999-10-26
Semiconductor die having sacrificial bond pads for die test
Grant 5,923,047 - Chia , et al. July 13, 1
1999-07-13
Molded laminate package with integral mold gate
Grant 5,886,398 - Low , et al. March 23, 1
1999-03-23
Ball grid array package employing raised metal contact rings
Grant 5,841,191 - Chia , et al. November 24, 1
1998-11-24
Stacked integrated chip package and method of making same
Grant 5,814,881 - Alagaratnam , et al. September 29, 1
1998-09-29
Method of cooling a packaged electronic device
Grant 5,568,683 - Chia , et al. October 29, 1
1996-10-29
High power dissipating packages with matched heatspreader heatsink assemblies
Grant 5,463,529 - Chia , et al. October 31, 1
1995-10-31
High power dissipating packages with matched heatspreader heatsink assemblies
Grant 5,353,193 - Chia , et al. October 4, 1
1994-10-04

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