| Patent | Date |
|---|
Inclusion of low-k dielectric material between bit lines
Grant 7,125,790 - Low , et al. October 24, 2 | 2006-10-24 |
Magnetic switching device
Grant 7,097,777 - Costrini , et al. August 29, 2 | 2006-08-29 |
Encapsulation of conductive lines of semiconductor devices
Grant 7,087,438 - Kasko , et al. August 8, 2 | 2006-08-08 |
Encapsulation of conductive lines of semiconductor devices
App 20060019431 - Kasko; Ihar ; et al. | 2006-01-26 |
Spacer integration scheme in MRAM technology
Grant 6,985,384 - Costrini , et al. January 10, 2 | 2006-01-10 |
Self-aligned mask to reduce cell layout area
Grant 6,974,770 - Costrini , et al. December 13, 2 | 2005-12-13 |
Magnetic switching device
App 20050207064 - Costrini, Gregory ; et al. | 2005-09-22 |
Two-step magnetic tunnel junction stack deposition
Grant 6,884,630 - Gupta , et al. April 26, 2 | 2005-04-26 |
Inclusion of low-k dielectric material between bit lines
App 20050085096 - Low, Kia Seng ; et al. | 2005-04-21 |
MRAM MTJ stack to conductive line alignment method
Grant 6,858,441 - Nuetzel , et al. February 22, 2 | 2005-02-22 |
Method of forming surface-smoothing layer for semiconductor devices with magnetic material layers
Grant 6,846,683 - Low January 25, 2 | 2005-01-25 |
Self-aligned mask to reduce cell layout area
App 20040259358 - Costrini, Gregory ; et al. | 2004-12-23 |
Magnetic memory
Grant 6,768,150 - Low , et al. July 27, 2 | 2004-07-27 |
Bilayer CMP process to improve surface roughness of magnetic stack in MRAM technology
Grant 6,743,642 - Costrini , et al. June 1, 2 | 2004-06-01 |
Carbon-graded layer for improved adhesion of low-k dielectrics to silicon substrates
Grant 6,740,539 - Conti , et al. May 25, 2 | 2004-05-25 |
Patterning metal stack layers of magnetic switching device, utilizing a bilayer metal hardmask
App 20040084400 - Costrini, Gregory ; et al. | 2004-05-06 |
Two-step magnetic tunnel junction stack deposition
App 20040087039 - Gupta, Arunava ; et al. | 2004-05-06 |
Bilayer Cmp Process To Improve Surface Roughness Of Magnetic Stack In Mram Technology
App 20040087038 - Costrini, Gregory ; et al. | 2004-05-06 |
Spacer integration scheme in MRAM technology
App 20040063223 - Costrini, Gregory ; et al. | 2004-04-01 |
MRAM MTJ stack to conductive line alignment method
App 20040043579 - Nuetzel, Joachim ; et al. | 2004-03-04 |
Insulating Cap Layer And Conductive Cap Layer For Semiconductor Devices With Magnetic Material Layers
App 20040021188 - Low, Kia-Seng ; et al. | 2004-02-05 |
Insulating cap layer and conductive cap layer for semiconductor devices with magnetic material layers
Grant 6,680,500 - Low , et al. January 20, 2 | 2004-01-20 |
Surface-smoothing conductive layer for semiconductor devices with magnetic material layers
App 20030211726 - Low, Kia-Seng | 2003-11-13 |
Carbon-graded layer for improved adhesion of low-k dielectrics to silicon substrates
App 20030153198 - Conti, Richard A. ; et al. | 2003-08-14 |
Carbon-graded layer for improved adhesion of low-k dielectrics to silicon substrates
App 20030017642 - Conti, Richard A. ; et al. | 2003-01-23 |
Single step chemical mechanical polish process to improve the surface roughness in MRAM technology
App 20020098705 - Low, Kia-Seng | 2002-07-25 |
| 