Lovejoy; Steven G.
Patent Applications and Registrations
Patent applications and USPTO patent grants for Lovejoy; Steven G..The latest application filed is for "ic chip parameter modeling".
- Lovejoy; Steven G. - Hopewell Junction NY
- Lovejoy; Steven G. - South Burlington VT
| Patent | Date |
|---|---|
| Efficient methodology for the accurate generation of customized compact model parameters from electrical test data Grant 8,032,349 - Loo , et al. October 4, 2 | 2011-10-04 |
| IC chip parameter modeling Grant 7,783,466 - Jones , et al. August 24, 2 | 2010-08-24 |
| Ic Chip Parameter Modeling App 20080275675 - Jones; John R. ; et al. | 2008-11-06 |
| Efficient Methodology For The Accurate Generation Of Customized Compact Model Parameters From Electrical Test Data App 20080183442 - Loo; Sim Y. ; et al. | 2008-07-31 |
| Integrated circuit macro placing system and method Grant 7,124,387 - Allen , et al. October 17, 2 | 2006-10-17 |
| Integrated Circuit Macro Placing System And Method App 20060026545 - Allen; Robert J. ; et al. | 2006-02-02 |
uspto.report is an independent third-party trademark research tool that is not affiliated, endorsed, or sponsored by the United States Patent and Trademark Office (USPTO) or any other governmental organization. The information provided by uspto.report is based on publicly available data at the time of writing and is intended for informational purposes only.
While we strive to provide accurate and up-to-date information, we do not guarantee the accuracy, completeness, reliability, or suitability of the information displayed on this site. The use of this site is at your own risk. Any reliance you place on such information is therefore strictly at your own risk.
All official trademark data, including owner information, should be verified by visiting the official USPTO website at www.uspto.gov. This site is not intended to replace professional legal advice and should not be used as a substitute for consulting with a legal professional who is knowledgeable about trademark law.
| 