Loranger; Marc P.
Patent Applications and Registrations
Patent applications and USPTO patent grants for Loranger; Marc P..The latest application filed is for "test system for integrated circuits with serdes ports".
- Loranger; Marc P. - Livermore CA
| Patent | Date |
|---|---|
| Test system for integrated circuits with serdes ports Grant 7,058,535 - Chenoweth , et al. June 6, 2 | 2006-06-06 |
| Test system for integrated circuits with serdes ports App 20050182588 - Chenoweth, Gordon Edward ; et al. | 2005-08-18 |
| Partitionable embedded circuit test system for integrated circuit App 20030167427 - Kraus, Lawrence ; et al. | 2003-09-04 |
| Partitionable embedded circuit test system for integrated circuit Grant 6,587,979 - Kraus , et al. July 1, 2 | 2003-07-01 |
| Field programmable gate array with program encryption Grant 6,351,814 - Batinic , et al. February 26, 2 | 2002-02-26 |
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