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Patent applications and USPTO patent grants for Lopergolo; Emanuele F..The latest application filed is for "land grid array interposer with compressible conductors".
Patent | Date |
---|---|
Land grid array interposer with compressible conductors Grant 8,672,688 - Florence, Jr. , et al. March 18, 2 | 2014-03-18 |
Delayed contact action connector Grant 8,662,931 - Healey , et al. March 4, 2 | 2014-03-04 |
Land Grid Array Interposer With Compressible Conductors App 20130183872 - FLORENCE, JR.; Robert F. ;   et al. | 2013-07-18 |
Delayed contact action connector Grant 8,282,420 - Healey , et al. October 9, 2 | 2012-10-09 |
Component Securing System And Associated Method App 20110067910 - Domitrovits; Michael J. ;   et al. | 2011-03-24 |
Delayed Contact Action Connector App 20110070775 - Healey; H. John ;   et al. | 2011-03-24 |
Large array surface mount technology connector cradle assembly Grant 7,758,390 - Domitrovits , et al. July 20, 2 | 2010-07-20 |
Large Array Surface Mount Technology Connector Cradle Assembly App 20090215289 - DOMITROVITS; MICHAEL J. ;   et al. | 2009-08-27 |
Large array connector for coupling wafers with a printed circuit board Grant 7,547,231 - Domitrovits , et al. June 16, 2 | 2009-06-16 |
Actuation mechanism for mating electronic card interconnect systems Grant 7,505,251 - Canfield , et al. March 17, 2 | 2009-03-17 |
Actuation mechanism for mating electronic card interconnect systems App 20070097605 - Canfield; Shawn M. ;   et al. | 2007-05-03 |
Micro Compliant Interconnect Apparatus For Integrated Circuit Devices App 20040008048 - Florence, Robert F. JR. ;   et al. | 2004-01-15 |
Micro compliant interconnect apparatus for integrated circuit devices Grant 6,674,297 - Florence, Jr. , et al. January 6, 2 | 2004-01-06 |
Method For Shorting Pin Grid Array Pins For Plating App 20020125124 - Lake, Arden S. ;   et al. | 2002-09-12 |
Process for electroplating pins of an integrated circuit package App 20010004965 - Lopergolo, Emanuele F. ;   et al. | 2001-06-28 |
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