Loo; Neo Yong

Patent Applications and Registrations

Patent applications and USPTO patent grants for Loo; Neo Yong.The latest application filed is for "wafer level packaging".

Company Profile

0.18.21

Loo; Neo Yong - Singapore SG

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Apparatus and method for packaging circuits Grant 8,138,617 - Poo , et al. March 20, 2	2012-03-20
Wafer level packaging Grant 8,106,488 - Chua , et al. January 31, 2	2012-01-31
Castellation wafer level packaging of integrated circuit chips Grant 8,008,126 - Jeung , et al. August 30, 2	2011-08-30
Wafer Level Packaging App 20110018143 - Chua; Swee Kwang ; et al.	2011-01-27
Castellation Wafer Level Packaging Of Integrated Circuit Chips App 20100068851 - Jeung; Boon Suan ; et al.	2010-03-18
Castellation wafer level packaging of integrated circuit chips Grant 7,679,179 - Jeung , et al. March 16, 2	2010-03-16
Apparatus and method for packaging circuits Grant 7,675,169 - Poo , et al. March 9, 2	2010-03-09
Castellation wafer level packaging of integrated circuit chips Grant 7,528,477 - Jeung , et al. May 5, 2	2009-05-05
Microelectronic Imagers And Methods For Manufacturing Such Microelectronic Imagers App 20090014822 - Poo; Chia Yong ; et al.	2009-01-15
Method for fabricating packaged die Grant 7,358,154 - Poo , et al. April 15, 2	2008-04-15
Castellation Wafer Level Packaging Of Integrated Circuit Chips App 20080067675 - Jeung; Boon Suan ; et al.	2008-03-20
Support elements for semiconductor devices with peripherally located bond pads Grant 7,285,850 - Poo , et al. October 23, 2	2007-10-23
Castellation wafer level packaging of integrated circuit chips Grant 7,276,387 - Jeung , et al. October 2, 2	2007-10-02
Semiconductor devices and semiconductor device components with peripherally located, castellated contacts, assemblies and packages including such semiconductor devices or packages and associated methods Grant 7,226,809 - Poo , et al. June 5, 2	2007-06-05
Semiconductor devices including peripherally located bond pads, intermediates thereof, assemblies, and packages including the semiconductor devices, and support elements for the semiconductor devices Grant 7,115,984 - Poo , et al. October 3, 2	2006-10-03
Support elements for semiconductor devices with peripherally located bond pads App 20060208350 - Poo; Chia Yong ; et al.	2006-09-21
Semiconductor devices including peripherally located bond pads, intermediates thereof, and assemblies and packages including the semiconductor devices App 20060208351 - Poo; Chia Yong ; et al.	2006-09-21
Apparatus and method for packaging circuits App 20060084240 - Poo; Chia Yong ; et al.	2006-04-20
Castellation wafer level packaging of integrated circuit chips App 20060014319 - Jeung; Boon Suan ; et al.	2006-01-19
Castellation wafer level packaging of integrated circuit chips App 20060008946 - Jeung; Boon Suan ; et al.	2006-01-12
Castellation wafer level packaging of integrated circuit chips App 20060006519 - Jeung; Boon Suan ; et al.	2006-01-12
Castellation wafer level packaging of integrated circuit chips App 20060001142 - Jeung; Boon Suan ; et al.	2006-01-05
Castellation wafer level packaging of integrated circuit chips Grant 6,949,407 - Jeung , et al. September 27, 2	2005-09-27
Castellation Wafer Level Packaging Of Integrated Circuit Chips App 20050130345 - Jeung, Boon Suan ; et al.	2005-06-16
Apparatus and method for packaging circuits Grant 6,894,386 - Poo , et al. May 17, 2	2005-05-17
Castellation wafer level packaging of integrated circuit chips Grant 6,855,572 - Jeung , et al. February 15, 2	2005-02-15
Apparatus and method for packaging circuits App 20050029668 - Poo, Chia Yong ; et al.	2005-02-10
Semiconductor devices and semiconductor device components with peripherally located, castellated contacts, assemblies and packages including such semiconductor devices or packages Grant 6,818,977 - Poo , et al. November 16, 2	2004-11-16
Semiconductor devices including peripherally located bond pads, intermediates thereof, assemblies, and packages including the semiconductor devices, and support elements for the semiconductor devices App 20040124523 - Poo, Chia Yong ; et al.	2004-07-01
Semiconductor devices including peripherally located bond pads, assemblies, packages, and methods Grant 6,727,116 - Poo , et al. April 27, 2	2004-04-27
Castellation wafer level packaging of integrated circuit chips App 20040043535 - Jeung, Boon Suan ; et al.	2004-03-04
Semiconductor devices and semiconductor device components with peripherally located, castellated contacts, assemblies and packages including such semiconductor devices or packages and associated methods App 20030230802 - Poo, Chia Yong ; et al.	2003-12-18
Semiconductor devices and semiconductor device components with peripherally located, castellated contacts, assemblies and packages including such semiconductor devices or packages and associated methods App 20030232462 - Poo, Chia Yong ; et al.	2003-12-18
Semiconductor Devices Including Peripherally Located Bond Pads, Assemblies, Packages, And Methods App 20030232460 - Poo, Chia Yong ; et al.	2003-12-18
Wafer level stackable semiconductor package Grant 6,611,052 - Poo , et al. August 26, 2	2003-08-26
Stackable semiconductor package and wafer level fabrication method Grant 6,582,992 - Poo , et al. June 24, 2	2003-06-24
Stackable semiconductor package and wafer level fabrication method App 20030094683 - Poo, Chia Yong ; et al.	2003-05-22
Stackable Semiconductor Package And Wafer Level Fabrication Method App 20030096454 - Poo, Chia Yong ; et al.	2003-05-22
Apparatus and method for packaging circuits App 20030067001 - Poo, Chin Yong ; et al.	2003-04-10

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