loadpatents
name:-0.0028750896453857
name:-0.012722969055176
name:-0.0003509521484375
Lohman; Jeffrey A. Patent Filings

Lohman; Jeffrey A.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Lohman; Jeffrey A..The latest application filed is for "instruction-level context switch in simd processor".

Company Profile
0.12.1
  • Lohman; Jeffrey A. - Winter Park FL
  • Lohman; Jeffrey A. - Maitland FL
  • Lohman; Jeffrey A. - Plano TX
  • Lohman; Jeffrey A. - Eau Claire WI
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Instruction-level context switch in SIMD processor
Grant 11,360,780 - Goodman , et al. June 14, 2
2022-06-14
Thread-group-scoped gate instruction
Grant 11,204,774 - Goodman , et al. December 21, 2
2021-12-21
Instruction-level Context Switch in SIMD Processor
App 20210224072 - Goodman; Benjiman L. ;   et al.
2021-07-22
Formatting denormal numbers for processing in a pipelined floating point unit
Grant 7,113,969 - Green , et al. September 26, 2
2006-09-26
Formatting denormal numbers for processing in a pipelined floating point unit
Grant 6,801,924 - Green , et al. October 5, 2
2004-10-05
Leading bit prediction with in-parallel correction
Grant 6,757,812 - Green , et al. June 29, 2
2004-06-29
System and method for efficient processing of denormal results as hardware exceptions
Grant 6,714,957 - Lohman March 30, 2
2004-03-30
System and method for efficient register file conversion of denormal numbers between scalar and SIMD formats
Grant 6,629,231 - Lohman September 30, 2
2003-09-30
Integer to floating point conversion using one's complement with subsequent correction to eliminate two's complement in critical path
Grant 6,523,050 - Dhablania , et al. February 18, 2
2003-02-18
Partitioned addressing apparatus for vector/scalar registers
Grant 5,745,721 - Beard , et al. April 28, 1
1998-04-28
Method and apparatus for chaining vector instructions
Grant 5,640,524 - Beard , et al. June 17, 1
1997-06-17
Vector processor having registers for control by vector resisters
Grant 5,544,337 - Beard , et al. August 6, 1
1996-08-06
Scalar/vector processor
Grant 5,430,884 - Beard , et al. July 4, 1
1995-07-04

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