loadpatents
name:-0.036484003067017
name:-0.084667921066284
name:-0.015286207199097
Loh; Wei-Yip Patent Filings

Loh; Wei-Yip

Patent Applications and Registrations

Patent applications and USPTO patent grants for Loh; Wei-Yip.The latest application filed is for "method of manufacturing semiconductor devices with multiple silicide regions".

Company Profile
16.24.35
  • Loh; Wei-Yip - Hsinchu TW
  • LOH; Wei-Yip - Hsinchu City TW
  • LOH; Wei-Yip - Loudonville NY
  • Loh; Wei-Yip - Austin TX
  • Loh; Wei-Yip - Singapore SG
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Method of Manufacturing Semiconductor Devices with Multiple Silicide Regions
App 20220293474 - Loh; Wei-Yip ;   et al.
2022-09-15
Contact Structure For Semiconductor Device And Method
App 20220278199 - Tsai; Yan-Ming ;   et al.
2022-09-01
Barrier-Free Approach for Forming Contact Plugs
App 20220277997 - Chen; Ching-Yi ;   et al.
2022-09-01
Contact with a silicide region
Grant 11,411,094 - Cheng , et al. August 9, 2
2022-08-09
Semiconductor device pre-cleaning
Grant 11,373,905 - Chu , et al. June 28, 2
2022-06-28
Method of manufacturing semiconductor devices with multiple silicide regions
Grant 11,348,839 - Loh , et al. May 31, 2
2022-05-31
Barrier-free approach for forming contact plugs
Grant 11,342,225 - Chen , et al. May 24, 2
2022-05-24
Contact structure for semiconductor device and method
Grant 11,335,774 - Tsai , et al. May 17, 2
2022-05-17
Ammonium Fluoride Pre-clean Protection
App 20220149519 - CHU; Li-Wei ;   et al.
2022-05-12
Semiconductor Device Pre-cleaning
App 20220068712 - CHU; Li-Wei ;   et al.
2022-03-03
Ammonium fluoride pre-clean protection
Grant 11,232,947 - Chu , et al. January 25, 2
2022-01-25
Deposition Window Enlargement
App 20210407808 - Chou; Meng-Han ;   et al.
2021-12-30
Method for forming semiconductor contact structure
Grant 11,195,791 - Cheng , et al. December 7, 2
2021-12-07
Semiconductor structure
Grant 11,177,172 - Tsai , et al. November 16, 2
2021-11-16
Conductive Feature Formation and Structure
App 20210296168 - Loh; Wei-Yip ;   et al.
2021-09-23
Conductive feature formation and structure
Grant 11,031,286 - Loh , et al. June 8, 2
2021-06-08
Contact Structure For Semiconductor Device And Method
App 20210118994 - Tsai; Yan-Ming ;   et al.
2021-04-22
Semiconductor Device and Method of Manufacturing
App 20210035868 - Loh; Wei-Yip ;   et al.
2021-02-04
Barrier-Free Approach For Forming Contact Plugs
App 20210035861 - Chen; Ching-Yi ;   et al.
2021-02-04
Treatment for Adhesion Improvement
App 20200388485 - Chen; Ching-Yi ;   et al.
2020-12-10
Treatment for adhesion improvement
Grant 10,755,917 - Chen , et al. A
2020-08-25
Method of Forming a Contact with a Silicide Region
App 20200152763 - Cheng; Yu-Wen ;   et al.
2020-05-14
Method For Forming Semiconductor Contact Structure
App 20200111739 - CHENG; Yu-Wen ;   et al.
2020-04-09
Semiconductor Structure
App 20200083100 - TSAI; YAN-MING ;   et al.
2020-03-12
Method of forming a contact with a silicide region
Grant 10,535,748 - Cheng , et al. Ja
2020-01-14
Treatment for Adhesion Improvement
App 20200006055 - Chen; Ching-Yi ;   et al.
2020-01-02
Contact structure and the method of forming the same
Grant 10,504,834 - Cheng , et al. Dec
2019-12-10
Semiconductor structure and method for manufacturing the same
Grant 10,483,164 - Tsai , et al. Nov
2019-11-19
Conductive Feature Formation and Structure
App 20190273023 - LOH; Wei-Yip ;   et al.
2019-09-05
Conformal Metal Diffusion Barrier And Plasma Treatment For Oxidized Metal Barrier
App 20190273147 - CHENG; Yu-Wen ;   et al.
2019-09-05
Contact Structure And The Method Of Forming The Same
App 20190273042 - Cheng; Yu-Wen ;   et al.
2019-09-05
Semiconductor Structure And Method For Manufacturing The Same
App 20190148230 - TSAI; YAN-MING ;   et al.
2019-05-16
N-type Iii-v Semiconductor Structures Having Ultra-shallow Junctions And Methods Of Forming Same
App 20150333128 - LEE; Rinus ;   et al.
2015-11-19
Tunneling field-effect transistor with direct tunneling for enhanced tunneling current
Grant 9,029,218 - Loh , et al. May 12, 2
2015-05-12
Sulfur And Selenium Passivation Of Semiconductors
App 20150118834 - LOH; Wei-Yip ;   et al.
2015-04-30
Phosphorus And Arsenic Doping Of Semiconductor Materials
App 20150111372 - TIECKELMANN; Robert ;   et al.
2015-04-23
Gated Circuit Structure With Ultra-thin, Epitaxially-grown Tunnel And Channel Layer
App 20140054549 - LOH; Wei-Yip ;   et al.
2014-02-27
Gated Circuit Structure With Self-aligned Tunneling Region
App 20130320427 - LOH; Wei-Yip ;   et al.
2013-12-05
Tunneling Field-effect Transistor With Direct Tunneling For Enhanced Tunneling Current
App 20130230954 - Loh; Wei-Yip ;   et al.
2013-09-05
Tunneling field-effect transistor with direct tunneling for enhanced tunneling current
Grant 8,436,422 - Loh , et al. May 7, 2
2013-05-07
Apparatus, system, and method for tunneling MOSFETs using self-aligned heterostructure source and isolated drain
Grant 8,421,165 - Loh , et al. April 16, 2
2013-04-16
Electro-optic device with novel insulating structure and a method for manufacturing the same
Grant 8,362,494 - Lo , et al. January 29, 2
2013-01-29
Interfacial barrier for work function modification of high performance CMOS devices
Grant 8,178,939 - Loh , et al. May 15, 2
2012-05-15
Apparatus, System, and Method for Tunneling Mosfets Using Self-Aligned Heterostructure Source and Isolated Drain
App 20110278670 - LOH; WEI-YIP ;   et al.
2011-11-17
Tunneling Field-effect Transistor With Direct Tunneling For Enhanced Tunneling Current
App 20110215425 - Loh; Wei-Yip ;   et al.
2011-09-08
Electro-optic Device And A Method For Manufacturing The Same
App 20110180795 - Lo; Guo-Qiang Patrick ;   et al.
2011-07-28
Interfacial Barrier for Work Function Modification of High Performance CMOS Devices
App 20100320510 - Loh; Wei-Yip ;   et al.
2010-12-23
Fully salicided (FUCA) MOSFET structure
Grant 7,682,914 - Lo , et al. March 23, 2
2010-03-23
Method For Straining A Semiconductor Wafer And A Wafer Substrate Unit Used Therein
App 20100052064 - Lo; Guo-Qiang ;   et al.
2010-03-04
Method of fabricating tensile strained layers and compressive strain layers for a CMOS device
Grant 7,439,165 - Lo , et al. October 21, 2
2008-10-21
Fully salicided (FUCA) MOSFET structure
App 20080064153 - Qiang Lo; Patrick Guo ;   et al.
2008-03-13
Fully salicided (FUSA) MOSFET structure
Grant 7,294,890 - Lo , et al. November 13, 2
2007-11-13
Method of fabricating strained channel devices
App 20060226483 - Lo; Patrick Guo Oiang ;   et al.
2006-10-12
Fully salicided (FUSA) MOSFET structure
App 20060199321 - Lo; Patrick Guo Qiang ;   et al.
2006-09-07

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