Lodermeyer; Johannes

Patent Applications and Registrations

Patent applications and USPTO patent grants for Lodermeyer; Johannes.The latest application filed is for "semiconductor package with plastic waveguide".

Company Profile

9.13.15

Lodermeyer; Johannes - Kinding DE
- Kinding DE
Lodermeyer; Johannes - Regensburg DE

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Semiconductor package with plastic waveguide Grant 11,387,533 - Wojnowski , et al. July 12, 2	2022-07-12
Methods for producing packaged semiconductor devices Grant 10,923,364 - Mayer , et al. February 16, 2	2021-02-16
Metallic interconnect, a method of manufacturing a metallic interconnect, a semiconductor arrangement and a method of manufacturing a semiconductor arrangement Grant 10,734,352 - Escher-Poeppel , et al.	2020-08-04
Tilted chip assembly for optical devices Grant 10,571,682 - Heitzer , et al. Feb	2020-02-25
Semiconductor package with a through port for sensor applications Grant 10,549,985 - Maier , et al. Fe	2020-02-04
Tilted chip assembly for optical devices Grant 10539779 -	2020-01-21
Semiconductor Package With Plastic Waveguide App 20200021002 - Wojnowski; Maciej ; et al.	2020-01-16
Semiconductor Apparatuses With Radio-frequency Line Elements, And Associated Manufacturing Methods App 20190198455 - HARTNER; Walter ; et al.	2019-06-27
Metallic Interconnect, a Method of Manufacturing a Metallic Interconnect, a Semiconductor Arrangement and a Method of Manufacturing a Semiconductor Arrangement App 20190103378 - Escher-Poeppel; Irmgard ; et al.	2019-04-04
Methods For Producing Packaged Semiconductor Devices App 20190074198 - MAYER; Kristina ; et al.	2019-03-07
Tilted Chip Assembly For Optical Devices App 20190049716 - HEITZER; Ludwig ; et al.	2019-02-14
Semiconductor Package with a Through Port for Sensor Applications and Methods of Manufacture App 20180148322 - Maier; Dominic ; et al.	2018-05-31
Semiconductor Device Including A Mems Die App 20170283247 - Meyer; Thorsten ; et al.	2017-10-05
Chip-embedded packages with backside die connection Grant 9,437,516 - Otremba , et al. September 6, 2	2016-09-06
Device including two power semiconductor chips and manufacturing thereof Grant 9,331,060 - Otremba , et al. May 3, 2	2016-05-03
Chip-Embedded Packages with Backside Die Connection App 20150194362 - Otremba; Ralf ; et al.	2015-07-09
Device Including Two Power Semiconductor Chips and Manufacturing Thereof App 20150155271 - Otremba; Ralf ; et al.	2015-06-04
Device including two power semiconductor chips and manufacturing thereof Grant 8,975,711 - Otremba , et al. March 10, 2	2015-03-10
Method of fabricating a semiconductor device Grant 8,603,864 - Riedl , et al. December 10, 2	2013-12-10
Device Including Two Power Semiconductor Chips and Manufacturing Thereof App 20130146991 - Otremba; Ralf ; et al.	2013-06-13
Semiconductor package Grant 7,989,930 - Riedl , et al. August 2, 2	2011-08-02
Method of making an integrated circuit including electrodeposition of metallic chromium Grant 7,909,978 - Lodermeyer , et al. March 22, 2	2011-03-22
Method Of Fabricating A Semiconductor Device App 20100059857 - Riedl; Edmund ; et al.	2010-03-11
Semiconductor Package App 20090108423 - Riedl; Edmund ; et al.	2009-04-30
Method Of Making An Integrated Circuit Including Electrodeposition Of Aluminium App 20080257744 - Lodermeyer; Johannes ; et al.	2008-10-23
Method Of Making An Integrated Circuit Including Electrodeposition Of Metallic Chromium App 20080257743 - Lodermeyer; Johannes ; et al.	2008-10-23

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