LOBIANCO; Anthony

Patent Applications and Registrations

Patent applications and USPTO patent grants for LOBIANCO; Anthony.The latest application filed is for "methods related to fabrication of shielded radio-frequency module".

Company Profile

0.8.10

LOBIANCO; Anthony - Irvine CA

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Methods Related To Fabrication Of Shielded Radio-frequency Module App 20150255403 - HOANG; Dinhphuoc V. ; et al.	2015-09-10
Packaged Radio-frequency Module Having Wirebond Shielding App 20150255402 - HOANG; Dinhphuoc V. ; et al.	2015-09-10
Methods for fabricating an overmolded semiconductor package with wirebonds for electromagnetic shielding Grant 9,054,115 - Hoang , et al. June 9, 2	2015-06-09
Overmolded semiconductor package with wirebonds for electromagnetic shielding Grant 9,041,168 - Hoang , et al. May 26, 2	2015-05-26
Overmolded semiconductor package with a wirebond cage for EMI shielding Grant 8,399,972 - Hoang , et al. March 19, 2	2013-03-19
Overmolded Semiconductor Package With Wirebonds For Electromagnetic Shielding App 20120146178 - Hoang; Dinhphuoc V. ; et al.	2012-06-14
Methods For Fabricating An Overmolded Semiconductor Package With Wirebonds For Electromagnetic Shielding App 20120137514 - Hoang; Dinhphuoc V. ; et al.	2012-06-07
Overmolded semiconductor package with a wirebond cage for EMI shielding Grant 8,071,431 - Hoang , et al. December 6, 2	2011-12-06
Overmolded Semiconductor Package With A Wirebond Cage For Emi Shielding App 20110084368 - Hoang; Dinphuoc V. ; et al.	2011-04-14
Methods for forming a through via Grant 7,696,064 - Gan , et al. April 13, 2	2010-04-13
3-d Stacking Of Active Devices Over Passive Devices App 20090267220 - Kuhlman; Mark A. ; et al.	2009-10-29
Surface Mount Package With Enhanced Strength Solder Joint App 20090127695 - Kim; Patrick ; et al.	2009-05-21
Methods for Forming a Through Via App 20090098731 - Gan; Qing ; et al.	2009-04-16
Method for fabricating a wafer level package having through wafer vias for external package connectivity App 20080064142 - GAN; QING ; et al.	2008-03-13
Overmolded semiconductor package with a wirebond cage for EMI shielding App 20070241440 - Hoang; Dinhphuoc V. ; et al.	2007-10-18

uspto.report is an independent third-party trademark research tool that is not affiliated, endorsed, or sponsored by the United States Patent and Trademark Office (USPTO) or any other governmental organization. The information provided by uspto.report is based on publicly available data at the time of writing and is intended for informational purposes only.

While we strive to provide accurate and up-to-date information, we do not guarantee the accuracy, completeness, reliability, or suitability of the information displayed on this site. The use of this site is at your own risk. Any reliance you place on such information is therefore strictly at your own risk.

All official trademark data, including owner information, should be verified by visiting the official USPTO website at www.uspto.gov. This site is not intended to replace professional legal advice and should not be used as a substitute for consulting with a legal professional who is knowledgeable about trademark law.