loadpatents
Patent applications and USPTO patent grants for Lo; Hsin-Jung.The latest application filed is for "integrated circuit chip using top post-passivation technology and bottom structure technology".
Patent | Date |
---|---|
Integrated circuit chip using top post-passivation technology and bottom structure technology Grant 9,612,615 - Lin , et al. April 4, 2 | 2017-04-04 |
Waveguide structures for signal and/or power transmission in a semiconductor device Grant 8,837,872 - Yang , et al. September 16, 2 | 2014-09-16 |
Chip package and method for fabricating the same Grant 8,836,146 - Chou , et al. September 16, 2 | 2014-09-16 |
Carbon nanotube circuit component structure Grant 8,692,374 - Lin , et al. April 8, 2 | 2014-04-08 |
Integrated Circuit Chip Using Top Post-passivation Technology And Bottom Structure Technology App 20130242500 - Lin; Mou-Shiung ;   et al. | 2013-09-19 |
Integrated circuit chip using top post-passivation technology and bottom structure technology Grant 8,456,856 - Lin , et al. June 4, 2 | 2013-06-04 |
Stacked chip package with redistribution lines Grant 8,426,958 - Lin , et al. April 23, 2 | 2013-04-23 |
Metal pad or metal bump over pad exposed by passivation layer Grant 8,399,989 - Lin , et al. March 19, 2 | 2013-03-19 |
Chip package Grant 8,368,193 - Lin , et al. February 5, 2 | 2013-02-05 |
Wire bonding method for preventing polymer cracking Grant 8,344,524 - Chou , et al. January 1, 2 | 2013-01-01 |
Semiconductor chip with post-passivation scheme formed over passivation layer Grant 8,319,354 - Lin , et al. November 27, 2 | 2012-11-27 |
Semiconductor chip with a bonding pad having contact and test areas Grant 8,304,766 - Lin , et al. November 6, 2 | 2012-11-06 |
Multichip Packages App 20120193785 - Lin; Mou-Shiung ;   et al. | 2012-08-02 |
Process of bonding circuitry components Grant 8,232,192 - Lin , et al. July 31, 2 | 2012-07-31 |
Waveguide Structures For Signal And/or Power Transmission In A Semiconductor Device App 20120170887 - Yang; Ping-Jung ;   et al. | 2012-07-05 |
Chip assembly with interconnection by metal bump Grant 8,193,636 - Lee , et al. June 5, 2 | 2012-06-05 |
Chip structure Grant 8,159,074 - Lin , et al. April 17, 2 | 2012-04-17 |
Bonding pad on IC substrate and method for making the same Grant 8,148,822 - Lin , et al. April 3, 2 | 2012-04-03 |
Chip Package App 20120007237 - Lin; Mou-Shiung ;   et al. | 2012-01-12 |
Carbon Nanotube Circuit Component Structure App 20110266680 - Lin; Mou-Shiung ;   et al. | 2011-11-03 |
Semiconductor Chip With Post-passivation Scheme Formed Over Passivation Layer App 20110266669 - Chou; Chiu-Ming ;   et al. | 2011-11-03 |
Chip package Grant 8,044,475 - Lin , et al. October 25, 2 | 2011-10-25 |
Stacked Chip Package With Redistribution Lines App 20110241183 - Lin; Mou-Shiung ;   et al. | 2011-10-06 |
Method For Forming A Double Embossing Structure App 20110215469 - Lo; Hsin-Jung ;   et al. | 2011-09-08 |
Chip Structure And Method For Fabricating The Same App 20110204510 - Lin; Mou-Shiung ;   et al. | 2011-08-25 |
Semiconductor chip with post-passivation scheme formed over passivation layer Grant 8,004,092 - Lin , et al. August 23, 2 | 2011-08-23 |
Semiconductor Chip App 20110198589 - Lin; Mou-Shiung ;   et al. | 2011-08-18 |
Carbon nanotube circuit component structure Grant 7,990,037 - Lin , et al. August 2, 2 | 2011-08-02 |
Stacked chip package with redistribution lines Grant 7,973,401 - Lin , et al. July 5, 2 | 2011-07-05 |
Chip package Grant 7,964,961 - Lee , et al. June 21, 2 | 2011-06-21 |
Chip structure Grant 7,964,973 - Lin , et al. June 21, 2 | 2011-06-21 |
Method for forming a double embossing structure Grant 7,960,269 - Lo , et al. June 14, 2 | 2011-06-14 |
Semiconductor chip with bond area Grant 7,947,978 - Lin , et al. May 24, 2 | 2011-05-24 |
Semiconductor chip and process for forming the same Grant 7,932,172 - Lin , et al. April 26, 2 | 2011-04-26 |
Integrated Circuit Chip Using Top Post-passivation Technology And Bottom Structure Technology App 20100246152 - Lin; Mou-Shiung ;   et al. | 2010-09-30 |
Chip Package App 20090121302 - Lin; Mou-Shiung ;   et al. | 2009-05-14 |
Chip Structure And Method For Fabricating The Same App 20090108453 - Lin; Mou-Shiung ;   et al. | 2009-04-30 |
Stacked chip package with redistribution lines Grant 7,508,059 - Lin , et al. March 24, 2 | 2009-03-24 |
Semiconductor Chip And Process For Forming The Same App 20090065871 - Lin; Mou-Shiung ;   et al. | 2009-03-12 |
Stacked Chip Package With Redistribution Lines App 20090057900 - Lin; Mou-Shiung ;   et al. | 2009-03-05 |
Chip package Grant 7,495,304 - Lin , et al. February 24, 2 | 2009-02-24 |
Semiconductor chip and process for forming the same Grant 7,473,999 - Lin , et al. January 6, 2 | 2009-01-06 |
Method for fabricating a circuit component Grant 7,462,558 - Lin , et al. December 9, 2 | 2008-12-09 |
Chip Assembly App 20080284014 - Lee; Jin-Yuan ;   et al. | 2008-11-20 |
Method for fabricating chip structure Grant 7,452,803 - Lin , et al. November 18, 2 | 2008-11-18 |
Semiconductor Chip With Post-passivation Scheme Formed Over Passivation Layer App 20080265413 - Chou; Chiu-Ming ;   et al. | 2008-10-30 |
Chip Package App 20080251940 - Lee; Jin-Yuan ;   et al. | 2008-10-16 |
Semiconductor chip with post-passivation scheme formed over passivation layer Grant 7,397,121 - Chou , et al. July 8, 2 | 2008-07-08 |
Chip Structure And Method For Fabrication The Same App 20080146018 - LIN; MOU-SHIUNG ;   et al. | 2008-06-19 |
Wire Bonding Method For Preventing Polymer Cracking App 20070212869 - Chou; Chiu-Ming ;   et al. | 2007-09-13 |
Chip Package And Method For Fabricating The Same App 20070205520 - Chou; Chien-Kang ;   et al. | 2007-09-06 |
Semiconductor Chip App 20070164279 - Lin; Mou-Shiung ;   et al. | 2007-07-19 |
Carbon Nanotube Circuit Component Structure App 20070164430 - Lin; Mou-Shiung ;   et al. | 2007-07-19 |
Semiconductor chip with post-passivation scheme formed over passivation layer App 20070096313 - Chou; Chiu-Ming ;   et al. | 2007-05-03 |
Semiconductor Chip And Process For Forming The Same App 20070069347 - Lin; Mou-Shiung ;   et al. | 2007-03-29 |
Method for forming a double embossing structure App 20070045855 - Lo; Hsin-Jung ;   et al. | 2007-03-01 |
Bonding Pad On Ic Substrate And Method For Making The Same App 20070023919 - Lin; Mou-Shiung ;   et al. | 2007-02-01 |
Metal Pad Or Metal Bump Over Pad Exposed By Passivation Layer App 20070026631 - Lin; Mou-Shiung ;   et al. | 2007-02-01 |
Chip Package App 20060273435 - Lin; Mou-Shiung ;   et al. | 2006-12-07 |
Stacked chip package with redistribution lines App 20060261459 - Lin; Mou-Shiung ;   et al. | 2006-11-23 |
Chip structure and method for fabricating the same App 20050277283 - Lin, Mou-Shiung ;   et al. | 2005-12-15 |
Chip bonding process App 20050266670 - Lin, Mou-Shiung ;   et al. | 2005-12-01 |
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