Liu; Yowjuang (Bill)

Patent Applications and Registrations

Patent applications and USPTO patent grants for Liu; Yowjuang (Bill).The latest application filed is for "double exposure photolithographic process".

Company Profile

0.17.3

Liu; Yowjuang (Bill) - Bill
Liu; Yowjuang Bill - San Jose CA

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
ESD protection device for high performance IC Grant 8,232,602 - Liu , et al. July 31, 2	2012-07-31
Density transition zones for integrated circuits Grant 8,159,044 - Chen , et al. April 17, 2	2012-04-17
CRAM transistors with high immunity to soft error Grant 7,821,050 - Liu , et al. October 26, 2	2010-10-26
Dual-oxide transistors for the improvement of reliability and off-state leakage Grant 7,514,758 - McElheny , et al. April 7, 2	2009-04-07
Fast and compact SCR ESD protection device for high-speed pins Grant 7,471,493 - Huang , et al. December 30, 2	2008-12-30
Integrated circuits with adjustable memory element power supplies Grant 7,463,057 - Rahim , et al. December 9, 2	2008-12-09
Double exposure photolithographic process App 20070243492 - McElheny; Peter J. ; et al.	2007-10-18
Floating base bipolar ESD devices Grant 7,279,753 - O , et al. October 9, 2	2007-10-09
ESD protection device for high performance IC App 20070170524 - Liu; Yowjuang (Bill) ; et al.	2007-07-26
Methods of fabricating ESD protection structures Grant 7,195,958 - Huang , et al. March 27, 2	2007-03-27
ESD protection device for high performance IC Grant 7,186,610 - Liu , et al. March 6, 2	2007-03-06
Field effect transistor with corner diffusions for reduced leakage Grant 6,974,998 - Liu , et al. December 13, 2	2005-12-13
Dual-oxide transistors for the improvement of reliability and off-state leakage App 20050224840 - McElheny, Peter John ; et al.	2005-10-13
Dual-oxide transistors for the improvement of reliability and off-state leakage Grant 6,951,792 - McElheny , et al. October 4, 2	2005-10-04
Advanced MOSFET design Grant 6,905,921 - Liu , et al. June 14, 2	2005-06-14
SCR device for ESD protection Grant 6,777,721 - Huang , et al. August 17, 2	2004-08-17
Dual-oxide transistors for the improvement of reliability and off-state leakage Grant 6,740,944 - McElheny , et al. May 25, 2	2004-05-25
Method of forming uniformly planarized structure in a semiconductor wafer Grant 6,689,697 - Jiang , et al. February 10, 2	2004-02-10
Method of forming a silicon bottom anti-reflective coating with reduced junction leakage during salicidation Grant 6,297,148 - Besser , et al. October 2, 2	2001-10-02
Method of forming a local interconnect with improved etch selectivity of silicon dioxide/silicide Grant 6,201,303 - Ngo , et al. March 13, 2	2001-03-13

uspto.report is an independent third-party trademark research tool that is not affiliated, endorsed, or sponsored by the United States Patent and Trademark Office (USPTO) or any other governmental organization. The information provided by uspto.report is based on publicly available data at the time of writing and is intended for informational purposes only.

While we strive to provide accurate and up-to-date information, we do not guarantee the accuracy, completeness, reliability, or suitability of the information displayed on this site. The use of this site is at your own risk. Any reliance you place on such information is therefore strictly at your own risk.

All official trademark data, including owner information, should be verified by visiting the official USPTO website at www.uspto.gov. This site is not intended to replace professional legal advice and should not be used as a substitute for consulting with a legal professional who is knowledgeable about trademark law.