Liu; Yow-Juang Bill

Patent Applications and Registrations

Patent applications and USPTO patent grants for Liu; Yow-Juang Bill.The latest application filed is for "esd device with low trigger voltage and low leakage".

Company Profile

0.20.3

Liu; Yow-Juang Bill - San Jose CA US
Liu; Yow-Juang (Bill) - Bill

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Integrated circuits with nonvolatile memory elements Grant 8,467,240 - Ratnakumar , et al. June 18, 2	2013-06-18
Integrated circuits with nonvolatile memory elements Grant 8,116,130 - Ratnakumar , et al. February 14, 2	2012-02-14
Apparatus and methods for electrostatic discharge circuitry with snap-back device Grant 8,089,744 - Rahim , et al. January 3, 2	2012-01-03
Method and device for electrostatic discharge protection Grant 7,981,753 - O , et al. July 19, 2	2011-07-19
Electrically-programmable transistor antifuses Grant 7,772,591 - Shih , et al. August 10, 2	2010-08-10
Method and device for electrostatic discharge protection Grant 7,671,416 - O , et al. March 2, 2	2010-03-02
ESD protection structure Grant 7,638,847 - O , et al. December 29, 2	2009-12-29
Output device having parasitic transistor for increased current drive Grant 7,511,533 - O , et al. March 31, 2	2009-03-31
Approach to reduce parasitic capacitance from dummy fill Grant 7,470,630 - Chen , et al. December 30, 2	2008-12-30
Fast trigger ESD device for protection of integrated circuits Grant 7,408,754 - O , et al. August 5, 2	2008-08-05
Method and apparatus with varying gate oxide thickness Grant 7,361,961 - Rahim , et al. April 22, 2	2008-04-22
ESD device with low trigger voltage and low leakage Grant 7,333,312 - O , et al. February 19, 2	2008-02-19
Effective I/O ESD protection device for high performance circuits Grant 7,326,998 - O , et al. February 5, 2	2008-02-05
Voltage clamp circuit with reduced I/O capacitance Grant 7,279,952 - O , et al. October 9, 2	2007-10-09
Methods for optimizing programmable logic device performance by reducing congestion Grant 7,210,115 - Rahim , et al. April 24, 2	2007-04-24
Stable programming circuitry for programmable integrated circuits Grant 7,170,810 - O , et al. January 30, 2	2007-01-30
ESD device with low trigger voltage and low leakage App 20070002507 - O; Hugh Sungki ; et al.	2007-01-04
Method and apparatus with varying gate oxide thickness App 20060237784 - Rahim; Irfan ; et al.	2006-10-26
Polysilicon gate doping level variation for reduced leakage current Grant 7,045,427 - McElheny , et al. May 16, 2	2006-05-16
Compact SCR device and method for integrated circuits App 20060054974 - O; Hugh Sungki ; et al.	2006-03-16
High performance capacitor structure Grant 6,829,127 - Liu , et al. December 7, 2	2004-12-07
Non-selective implantation process for forming contact regions in integrated circuits Grant 4,709,467 - Liu December 1, 1	1987-12-01

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