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Patent applications and USPTO patent grants for Liu; Louis Chao-Chiuan.The latest application filed is for "design-driven metal critical dimension (cd) biasing".
Patent | Date |
---|---|
Driven metal critical dimension (CD) biasing Grant 8,375,347 - Liu , et al. February 12, 2 | 2013-02-12 |
System and method for performance modeling of integrated circuits Grant 8,365,115 - Liu , et al. January 29, 2 | 2013-01-29 |
Systematic method for variable layout shrink Grant 8,286,119 - Hsu , et al. October 9, 2 | 2012-10-09 |
Design-driven Metal Critical Dimension (cd) Biasing App 20100293514 - Liu; Louis Chao-Chiuan ;   et al. | 2010-11-18 |
System and Method for Performance Modeling of Integrated Circuits App 20100229137 - Liu; Louis Chao-Chiuan ;   et al. | 2010-09-09 |
Systematic Method for Variable Layout Shrink App 20100199238 - Hsu; Fu-Chieh ;   et al. | 2010-08-05 |
Utilization of MACRO power routing area for buffer insertion Grant 6,855,967 - Liu , et al. February 15, 2 | 2005-02-15 |
Utilization of MACRO power routing area for buffer insertion App 20030049891 - Liu, Louis Chao-Chiuan ;   et al. | 2003-03-13 |
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