Liu; Chung-Lun

Patent Applications and Registrations

Patent applications and USPTO patent grants for Liu; Chung-Lun.The latest application filed is for "method for fabricating multi-chip stack structure".

Company Profile

0.10.14

Liu; Chung-Lun - Taichung TW
Liu; Chung-Lun - Taichung Hsien TW
Liu, Chung-Lun - Tantzu TW

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Method for fabricating multi-chip stack structure Grant 9,754,927 - Liu , et al. September 5, 2	2017-09-05
Method For Fabricating Multi-chip Stack Structure App 20150044821 - Liu; Chung-Lun ; et al.	2015-02-12
Multi-chip stack structure and method for fabricating the same Grant 8,896,130 - Liu , et al. November 25, 2	2014-11-25
Fabrication method of multi-chip stack structure Grant 7,981,729 - Huang , et al. July 19, 2	2011-07-19
Fabrication Method Of Multi-chip Stack Structure App 20100255635 - Huang; Jung-Pin ; et al.	2010-10-07
Multi-chip stack structure and fabrication method thereof Grant 7,768,106 - Huang , et al. August 3, 2	2010-08-03
Method for fabricating semiconductor package with stacked chips Grant 7,655,503 - Huang , et al. February 2, 2	2010-02-02
Multi-chip Stack Structure And Method For Fabricating The Same App 20090140440 - Liu; Chung-Lun ; et al.	2009-06-04
Multi-chip stack structure and fabricating method thereof App 20090014860 - Liu; Chung-Lun ; et al.	2009-01-15
Multi-chip semiconductor device having leads and method for fabricating the same App 20080283982 - Liu; Chung-Lun ; et al.	2008-11-20
Multi-chip stack structure and fabrication method thereof App 20080224289 - Huang; Jung-Pin ; et al.	2008-09-18
Multichip stacking structure App 20080174030 - Liu; Chung-Lun ; et al.	2008-07-24
Fabrication method of multichip stacking structure App 20080176358 - Liu; Chung-Lun ; et al.	2008-07-24
Method for fabricating a warpage-preventive circuit board Grant 7,266,888 - Chang , et al. September 11, 2	2007-09-11
Method for fabricating semiconductor package with stacked chips App 20070108571 - Huang; Jung-Pin ; et al.	2007-05-17
Semiconductor package with stacked chips and method for fabricating the same Grant 7,193,309 - Huang , et al. March 20, 2	2007-03-20
Semiconductor package with stacked chips and method for fabricating the same App 20060022315 - Huang; Jung-Pin ; et al.	2006-02-02
Multichip module Grant 6,919,627 - Liu , et al. July 19, 2	2005-07-19
Method for fabricating a warpage-preventive circuit board App 20050145413 - Chang, Chin-Huang ; et al.	2005-07-07
Warpage-preventive circuit board and method for fabricating the same Grant 6,864,434 - Chang , et al. March 8, 2	2005-03-08
Manufacturing method for multichip module App 20050006785 - Liu, Chung-Lun ; et al.	2005-01-13
Warpage-preventive circuit board and method for fabricating the same App 20040084205 - Chang, Chin-Huang ; et al.	2004-05-06
Multichip module and manufacturing method App 20040084760 - Liu, Chung-Lun ; et al.	2004-05-06

uspto.report is an independent third-party trademark research tool that is not affiliated, endorsed, or sponsored by the United States Patent and Trademark Office (USPTO) or any other governmental organization. The information provided by uspto.report is based on publicly available data at the time of writing and is intended for informational purposes only.

While we strive to provide accurate and up-to-date information, we do not guarantee the accuracy, completeness, reliability, or suitability of the information displayed on this site. The use of this site is at your own risk. Any reliance you place on such information is therefore strictly at your own risk.

All official trademark data, including owner information, should be verified by visiting the official USPTO website at www.uspto.gov. This site is not intended to replace professional legal advice and should not be used as a substitute for consulting with a legal professional who is knowledgeable about trademark law.