Liston; Thomas W.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Liston; Thomas W..The latest application filed is for "bypass system and method that mimics clock to data memory read timing".

Company Profile

0.18.15

Liston; Thomas W. - Austin TX US

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Memory column drowsy control Grant 9,317,087 - Ramaraju , et al. April 19, 2	2016-04-19
Bypass system and method that mimics clock to data memory read timing Grant 9,263,100 - Garni , et al. February 16, 2	2016-02-16
Semiconductor device with single-event latch-up prevention circuitry Grant 9,123,545 - Yang , et al. September 1, 2	2015-09-01
Bypass System And Method That Mimics Clock To Data Memory Read Timing App 20150155017 - Garni; Bradley J. ; et al.	2015-06-04
Memory with word level power gating Grant 9,026,808 - Yang , et al. May 5, 2	2015-05-05
Method and apparatus for sensing on-chip characteristics Grant 8,766,703 - Yang , et al. July 1, 2	2014-07-01
Semiconductor Device With Single-event Latch-up Prevention Circuitry App 20140167102 - YANG; JIANAN ; et al.	2014-06-19
System and method for soft error detection in memory devices Grant 8,717,829 - Sharma , et al. May 6, 2	2014-05-06
Single event latch-up prevention techniques for a semiconductor device Grant 8,685,800 - Yang , et al. April 1, 2	2014-04-01
Single-event Latch-up Prevention Techniques For A Semiconductor Device App 20140027810 - Yang; Jianan ; et al.	2014-01-30
System And Method For Soft Error Detection In Memory Devices App 20130343133 - Sharma; Ashish ; et al.	2013-12-26
Memory Column Drowsy Control App 20130290753 - Ramaraju; Ravindraraj ; et al.	2013-10-31
Memory With Word Level Power Gating App 20130290750 - Yang; Jianan ; et al.	2013-10-31
Dual port memory device Grant 7,940,599 - Lu , et al. May 10, 2	2011-05-10
Dual Port Memory Device App 20100232202 - Lu; Olga R. ; et al.	2010-09-16
Memory with level shifting word line driver and method thereof Grant 7,706,207 - Liston , et al. April 27, 2	2010-04-27
Circuit for storing information in an integrated circuit and method therefor Grant 7,554,841 - Liston June 30, 2	2009-06-30
Memory With Level Shifting Word Line Driver And Method Thereof App 20090021990 - Liston; Thomas W. ; et al.	2009-01-22
Memory with level shifting word line driver and method thereof Grant 7,440,354 - Liston , et al. October 21, 2	2008-10-21
Circuit For Storing Information In An Integrated Circuit And Method Therefor App 20080073722 - Liston; Thomas W.	2008-03-27
Memory with level shifting word line driver and method thereof App 20070263474 - Liston; Thomas W. ; et al.	2007-11-15
Method and apparatus for soft defect detection in a memory Grant 6,590,818 - Liston , et al. July 8, 2	2003-07-08

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