List; R. Scott

Patent Applications and Registrations

Patent applications and USPTO patent grants for List; R. Scott.The latest application filed is for "packaged electroosmotic pumps using porous frits for cooling integrated circuits".

Company Profile

0.40.44

List; R. Scott - Beaverton OR
List; R. Scott - Dallas TX

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Cooling micro-channels Grant 7,842,553 - Kim , et al. November 30, 2	2010-11-30
Integrated re-combiner for electroosmotic pumps using porous frits Grant 7,723,208 - Kim , et al. May 25, 2	2010-05-25
Method of forming a stack of heat generating integrated circuit chips with intervening cooling integrated circuit chips Grant 7,696,015 - Kim , et al. April 13, 2	2010-04-13
Electroosmotic pump using nanoporous dielectric frit Grant 7,667,319 - List , et al. February 23, 2	2010-02-23
Etch stop layer for silicon (Si) via etch in three-dimensional (3-D) wafer-to-wafer vertical stack Grant 7,615,462 - Kim , et al. November 10, 2	2009-11-10
Using external radiators with electroosmotic pumps for cooling integrated circuits Grant 7,576,432 - Kim , et al. August 18, 2	2009-08-18
Apparatus and method integrating an electro-osmotic pump and microchannel assembly into a die package Grant 7,569,426 - Myers , et al. August 4, 2	2009-08-04
Microelectronic assembly having thermoelectric elements to cool a die and a method of making the same Grant 7,537,954 - Ramanathan , et al. May 26, 2	2009-05-26
Apparatus and method integrating an electro-osmotic pump and microchannel assembly into a die package Grant 7,355,277 - Myers , et al. April 8, 2	2008-04-08
Method and structure for interfacing electronic devices Grant 7,348,217 - Kobrinsky , et al. March 25, 2	2008-03-25
Packaged electroosmotic pumps using porous frits for cooling integrated circuits App 20070278668 - Kim; Sarah E. ; et al.	2007-12-06
Method of doping a conductive layer near a via Grant 7,300,871 - Hau-Riege , et al. November 27, 2	2007-11-27
Packaged electroosmotic pumps using porous frits for cooling integrated circuits Grant 7,274,106 - Kim , et al. September 25, 2	2007-09-25
Cooling micro-channels App 20070200226 - Kim; Sarah E. ; et al.	2007-08-30
Apparatus And Method Integrating An Electro-osmotic Pump And Microchannel Assembly Into A Die Package App 20070190695 - Myers; Alan M. ; et al.	2007-08-16
Cooling micro-channels Grant 7,227,257 - Kim , et al. June 5, 2	2007-06-05
Process of vertically stacking multiple wafers supporting different active integrated circuit (IC) devices App 20070111386 - Kim; Sarah E. ; et al.	2007-05-17
Method And Structure For Vertically-stacked Device Contact App 20070087528 - Kim; Sarah E. ; et al.	2007-04-19
Etch stop layer for silicon (Si) via etch in three-dimensional (3-D) wafer-to-wafer vertical stack App 20070020805 - Kim; Sarah E. ; et al.	2007-01-25
Method and structure for interfacing electronic devices App 20070015340 - Kobrinsky; Mauro J. ; et al.	2007-01-18
Process of vertically stacking multiple wafers supporting different active integrated circuit (IC) devices Grant 7,157,787 - Kim , et al. January 2, 2	2007-01-02
Etch stop layer for silicon (Si) via etch in three-dimensional (3-D) wafer-to-wafer vertical stack Grant 7,148,565 - Kim , et al. December 12, 2	2006-12-12
Bonded wafer processing method Grant 7,129,172 - Morrow , et al. October 31, 2	2006-10-31
Electroosmotic pumps using porous frits for cooling integrated circuit stacks App 20060226541 - Kim; Sarah E. ; et al.	2006-10-12
Method of signal distribution based on a standing wave within a closed loop path Grant 7,120,817 - Kobrinsky , et al. October 10, 2	2006-10-10
Self-aligned electrodes contained within the trenches of an electroosmotic pump Grant 7,105,382 - Myers , et al. September 12, 2	2006-09-12
Electroosmotic pumps using porous frits for cooling integrated circuit stacks Grant 7,084,495 - Kim , et al. August 1, 2	2006-08-01
Barrier structure against corrosion and contamination in three-dimensional (3-D) wafer-to-wafer vertical stack Grant 7,056,807 - Kellar , et al. June 6, 2	2006-06-06
Methods of forming backside connections on a wafer stack Grant 7,056,813 - Morrow , et al. June 6, 2	2006-06-06
Microelectronic assembly having thermoelectric elements to cool a die and a method of making the same App 20060097383 - Ramanathan; Shriram ; et al.	2006-05-11
Wafer bonding using a flexible bladder press for three dimensional (3D) vertical stack integration Grant 7,037,804 - Kellar , et al. May 2, 2	2006-05-02
Microelectronic assembly having thermoelectric elements to cool a die and a method of making the same Grant 7,034,394 - Ramanathan , et al. April 25, 2	2006-04-25
Thick metal layer integrated process flow to improve power delivery and mechanical buffering App 20060076678 - Kim; Sarah E. ; et al.	2006-04-13
Using external radiators with electroosmotic pumps for cooling integrated circuits App 20060055030 - Kim; Sarah E. ; et al.	2006-03-16
Using external radiators with electroosmotic pumps for cooling integrated circuits Grant 6,992,381 - Kim , et al. January 31, 2	2006-01-31
Electro-osmotic pumps and micro-channels Grant 6,981,849 - Kim , et al. January 3, 2	2006-01-03
Thick metal layer integrated process flow to improve power delivery and mechanical buffering Grant 6,977,435 - Kim , et al. December 20, 2	2005-12-20
Wafer bonding using a flexible bladder press and thinned wafers for three-dimensional (3D) wafer-to-wafer vertical stack integration, and application thereof Grant 6,975,016 - Kellar , et al. December 13, 2	2005-12-13
Bonded wafer processing method App 20050215056 - Morrow, Patrick ; et al.	2005-09-29
Method and structure for interfacing electronic devices App 20050184400 - Kobrinsky, Mauro J. ; et al.	2005-08-25
Methods of forming backside connections on a wafer stack App 20050164490 - Morrow, Patrick ; et al.	2005-07-28
Apparatus and method integrating an electro-osmotic pump and microchannel assembly into a die package App 20050139996 - Myers, Alan M. ; et al.	2005-06-30
Etch thinning techniques for wafer-to-wafer vertical stacks Grant 6,908,565 - Kim , et al. June 21, 2	2005-06-21
Self-aligned electrodes contained within the trenches of an electroosmotic pump App 20050112816 - Myers, Alan M. ; et al.	2005-05-26
Methods of forming backside connections on a wafer stack Grant 6,897,125 - Morrow , et al. May 24, 2	2005-05-24
Electroosmotic pump using nanoporous dielectric frit App 20050104199 - List, R. Scott ; et al.	2005-05-19
Using external radiators with electroosmotic pumps for cooling integrated circuits App 20050093138 - Kim, Sarah E. ; et al.	2005-05-05
Method of making a semiconductor device that has copper damascene interconnects with enhanced electromigration reliability App 20050095751 - Hau-Riege, Stefan ; et al.	2005-05-05
Dielectric recess for wafer-to-wafer and die-to-die metal bonding and method of fabricating the same Grant 6,887,769 - Kellar , et al. May 3, 2	2005-05-03
Electroosmotic pumps using porous frits for cooling integrated circuit stacks App 20050085018 - Kim, Sarah E. ; et al.	2005-04-21
Microelectronic assembly having thermoelectric elements to cool a die and a method of making the same App 20050077619 - Ramanathan, Shriram ; et al.	2005-04-14
Integrated re-combiner for electroosmotic pumps using porous frits App 20050074953 - Kim, Sarah E. ; et al.	2005-04-07
Packaged electroosmotic pumps using porous frits for cooling integrated circuits App 20050062150 - Kim, Sarah E. ; et al.	2005-03-24
Method and structure for interfacing electronic devices Grant 6,870,270 - Kobrinsky , et al. March 22, 2	2005-03-22
Methods Of Forming Backside Connections On A Wafer Stack App 20050059217 - Morrow, Patrick ; et al.	2005-03-17
Thick metal layer integrated process flow to improve power delivery and mechanical buffering App 20050051894 - Kim, Sarah E. ; et al.	2005-03-10
Method of making a SDI electroosmotic pump using nanoporous dielectric frit Grant 6,861,274 - List , et al. March 1, 2	2005-03-01
Method of making a semiconductor device that has copper damascene interconnects with enhanced electromigration reliability Grant 6,833,321 - Hau-Riege , et al. December 21, 2	2004-12-21
Closed loop based timing signal distribution architecture App 20040243873 - Kobrinsky, Mauro J. ; et al.	2004-12-02
Method and structure for interfacing electronic devices App 20040232537 - Kobrinsky, Mauro J. ; et al.	2004-11-25
Process of vertically stacking multiple wafers supporting different active integrated circuit (IC) devices App 20040219763 - Kim, Sarah E. ; et al.	2004-11-04
Electroosmotic pump using nanoporous dielectric frit App 20040191943 - List, R. Scott ; et al.	2004-09-30
Thinning techniques for wafer-to-wafer vertical stacks Grant 6,790,748 - Kim , et al. September 14, 2	2004-09-14
Fabrication of 3-D capacitor with dual damascene process Grant 6,790,780 - Kim , et al. September 14, 2	2004-09-14
Cooling micro-channels App 20040145047 - Kim, Sarah E. ; et al.	2004-07-29
Wafer bonding for three-dimensional (3D) integration App 20040142540 - Kellar, Scot A. ; et al.	2004-07-22
Process of vertically stacking multiple wafers supporting different active integrated circuit (IC) devices Grant 6,762,076 - Kim , et al. July 13, 2	2004-07-13
Method and structure for vertically-stacked device contact App 20040124509 - Kim, Sarah E. ; et al.	2004-07-01
Thinning techniques for wafer-to-wafer vertical stacks App 20040121556 - Kim, Sarah E. ; et al.	2004-06-24
Electro-osmotic pumps and micro-channels App 20040120827 - Kim, Sarah E. ; et al.	2004-06-24
Etch thinning techniques for wafer-to-wafer vertical stacks App 20040118806 - Kim, Sarah E. ; et al.	2004-06-24
Barrier structure against corrosion and contamination in three-dimensional (3-D) wafer-to-wafer vertical stack App 20040014308 - Kellar, Scot A. ; et al.	2004-01-22
Method of making an on-die decoupling capacitor for a semiconductor device Grant 6,664,168 - Andideh , et al. December 16, 2	2003-12-16
Barrier structure against corrosion and contamination in three-dimensional (3-D) wafer-to-wafer vertical stack Grant 6,661,085 - Kellar , et al. December 9, 2	2003-12-09
Etch stop layer for silicon (Si) via etch in three-dimensional (3-D) wafer-to-wafer vertical stack Grant 6,645,832 - Kim , et al. November 11, 2	2003-11-11
Etch stop layer for silicon (Si) via etch in three-dimensional (3-D) wafer-to-wafer vertical stack App 20030205824 - Kim, Sarah E. ; et al.	2003-11-06
Etch Stop Layer For Silicon (si) Via Etch In Three-dimensional (3-d) Wafer-to-wafer Vertical Stack App 20030157796 - Kim, Sarah E. ; et al.	2003-08-21
Process of vertically stacking multiple wafers supporting different active integrated circuit (IC) devices App 20030157748 - Kim, Sarah E. ; et al.	2003-08-21
Dielectric recess for wafer-to-wafer and die-to-die metal bonding and method of fabricating the same App 20030157782 - Kellar, Scot A. ; et al.	2003-08-21
Wafer bonding for three-dimensional (3D) integration App 20030148596 - Kellar, Scot A. ; et al.	2003-08-07
Barrier structure against corrosion and contamination in three-dimensional (3-D) wafer-to-wafer vertical stack App 20030148590 - Kellar, Scot A. ; et al.	2003-08-07
Method of making a semiconductor device that has copper damascene interconnects with enhanced electromigration reliability App 20030104692 - Hau-Riege, Stefan ; et al.	2003-06-05
Fabrication of 3-D capacitor with dual damascene process App 20030060052 - Kim, Sarah E. ; et al.	2003-03-27
Integrated circuit dielectrics Grant 6,059,553 - Jin , et al. May 9, 2	2000-05-09