Liptay; John S.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Liptay; John S..The latest application filed is for "absolute address bits kept in branch history table".

Company Profile

0.18.1

Liptay; John S. - Rhinebeck NY
Liptay; John S. - late of Rhinebeck NY
Liptay; John S. - Rhinebeek NY
Liptay; John S. - Poughkeepsie NY

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Program store compare handling between instruction and operand caches Grant 6,865,645 - Shum , et al. March 8, 2	2005-03-08
Method for ensuring that a line is present in an instruction cache Grant 6,751,708 - Liptay , et al. June 15, 2	2004-06-15
Absolute address bits kept in branch history table Grant 6,745,313 - Liptay , et al. June 1, 2	2004-06-01
Address generation interlock detection Grant 6,671,794 - Giamei , et al. December 30, 2	2003-12-30
Method and system for testing millicode branch points Grant 6,662,296 - Farrell , et al. December 9, 2	2003-12-09
Absolute address bits kept in branch history table App 20030131212 - Liptay, John S. ; et al.	2003-07-10
Read only store as part of cache store for storing frequently used millicode instructions Grant 5,625,808 - Webb , et al. April 29, 1	1997-04-29
Data processor with enhanced error recovery Grant 5,504,859 - Gustafson , et al. April 2, 1	1996-04-02
Checkpoint synchronization with instruction overlap enabled Grant 5,495,590 - Comfort , et al. February 27, 1	1996-02-27
Method for processing checkpoint instructions to allow concurrent execution of overlapping instructions Grant 5,495,587 - Comfort , et al. February 27, 1	1996-02-27
System for monitoring and undoing execution of instructions beyond a serialization point upon occurrence of in-correct results Grant 5,257,354 - Comfort , et al. October 26, 1	1993-10-26
Computer system with logic for writing instruction identifying data into array control lists for precise post-branch recoveries Grant 5,134,561 - Liptay * July 28, 1	1992-07-28
Computer system with logic for writing instruction identifying data into array control lists for precise post-branch recoveries Grant 4,901,233 - Liptay February 13, 1	1990-02-13
Address formulation interlock mechanism Grant 4,287,561 - Liptay September 1, 1	1981-09-01
Multi-instruction stream branch processing mechanism Grant 4,200,927 - Hughes , et al. April 29, 1	1980-04-29
Operand alignment controls for VFL instructions Grant 4,189,772 - Liptay February 19, 1	1980-02-19
Cache bypass control for operand fetches Grant 4,189,770 - Gannon , et al. February 19, 1	1980-02-19
Operand fetch control improvement Grant 4,189,768 - Liptay , et al. February 19, 1	1980-02-19
Virtual Memory System Grant 3,781,808 - Ahearn , et al. December 25, 1	1973-12-25

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