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Patent applications and USPTO patent grants for LIOU; HO-CHUN.The latest application filed is for "high voltage device".
Patent | Date |
---|---|
High Voltage Device App 20220254923 - WANG; HUNG-SEN ;   et al. | 2022-08-11 |
High voltage device Grant 11,322,609 - Wang , et al. May 3, 2 | 2022-05-03 |
Semiconductor Device App 20210265285 - YANG; Ming-Hui ;   et al. | 2021-08-26 |
High Voltage Device App 20210167205 - WANG; HUNG-SEN ;   et al. | 2021-06-03 |
Semiconductor device Grant 11,011,478 - Yang , et al. May 18, 2 | 2021-05-18 |
Semiconductor device and manufacturing method thereof Grant 10,930,599 - Yang , et al. February 23, 2 | 2021-02-23 |
Semiconductor device and manufacturing method thereof Grant 10,714,384 - Yang , et al. | 2020-07-14 |
Semiconductor Device And Manufacturing Method Thereof App 20190363007 - YANG; Ming-Hui ;   et al. | 2019-11-28 |
Semiconductor Device App 20190348376 - YANG; Ming-Hui ;   et al. | 2019-11-14 |
Semiconductor device and manufacturing method thereof Grant 10,373,865 - Yang , et al. | 2019-08-06 |
Semiconductor device and manufacturing method thereof Grant 10,366,956 - Yang , et al. July 30, 2 | 2019-07-30 |
Semiconductor Device And Manufacturing Method Thereof App 20190096827 - YANG; Ming-Hui ;   et al. | 2019-03-28 |
Semiconductor Device And Manufacturing Method Thereof App 20170025367 - YANG; Ming-Hui ;   et al. | 2017-01-26 |
Integrated circuit and method of fabricating the same Grant 9,553,140 - Wang , et al. January 24, 2 | 2017-01-24 |
Semiconductor Device And Manufacturing Method Thereof App 20160365318 - YANG; Ming-Hui ;   et al. | 2016-12-15 |
Integrated Circuit And Method Of Fabricating The Same App 20160218171 - WANG; Hung-Sen ;   et al. | 2016-07-28 |
Integrated circuit and method of fabricating the same Grant 9,331,136 - Wang , et al. May 3, 2 | 2016-05-03 |
Integrated Circuit And Method Of Fabricating The Same App 20150349045 - WANG; Hung-Sen ;   et al. | 2015-12-03 |
Method for erasing a flash EEPROM Grant 6,930,926 - Lin , et al. August 16, 2 | 2005-08-16 |
Dual reference cell sensing scheme for non-volatile memory Grant 6,845,052 - Ho , et al. January 18, 2 | 2005-01-18 |
[dual Reference Cell Sensing Scheme For Non-volatile Memory] App 20040264249 - HO, HSIN-YI ;   et al. | 2004-12-30 |
Apparatus and system for reading non-volatile memory with dual reference cells Grant 6,665,216 - Ho , et al. December 16, 2 | 2003-12-16 |
Method for designing circuit layout of non-neighboring metal bit lines to reduce coupling effect Grant 6,618,848 - Chen , et al. September 9, 2 | 2003-09-09 |
Method for erasing a flash EEPROM App 20030161187 - Lin, Yu-Shen ;   et al. | 2003-08-28 |
Voltage-boosting generator for reducing effects due to operating voltage variation and temperature change App 20030057995 - Hsu, Hsien-Wen ;   et al. | 2003-03-27 |
Method for designing circuit layout of non-neighboring metal bit lines to reduce coupling effect App 20020138815 - Chen, Han-Sung ;   et al. | 2002-09-26 |
Methods of repairing field-effect memory cells in an electrically erasable and electrically programmable memory device Grant 5,233,562 - Ong , et al. August 3, 1 | 1993-08-03 |
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