Liong; Jin Yoong
Patent Applications and Registrations
Patent applications and USPTO patent grants for Liong; Jin Yoong.The latest application filed is for "molded wafer level packaging".
- Liong; Jin Yoong - Seremban MY
- - Seremban MY
| Patent | Date |
|---|---|
| Molded wafer level packaging Grant 10,916,485 - Wang , et al. February 9, 2 | 2021-02-09 |
| Molded Wafer Level Packaging App 20200126880 - WANG; Soon Wei ; et al. | 2020-04-23 |
| Molded wafer level packaging Grant 10,559,510 - Wang , et al. Feb | 2020-02-11 |
| Chip-on-lead Semiconductor Device Packages With Electrically Isolated Signal Leads App 20200035586A1 - | 2020-01-30 |
| Molded Wafer Level Packaging App 20190067143 - WANG; Soon Wei ; et al. | 2019-02-28 |
| Method And System For Extending Die Size And Packaged Semiconductor Devices Incorporating The Same App 20160104662 - Prajuckamol; Atapol ; et al. | 2016-04-14 |
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