Lin; Yung-Chi

Patent Applications and Registrations

Patent applications and USPTO patent grants for Lin; Yung-Chi.The latest application filed is for "positive-pressure protective wear".

Company Profile

16.69.75

Lin; Yung-Chi - Su-Lin TW
Lin; Yung Chi - Taichung City TW
Lin; Yung-Chi - New Taipei City TW
Lin; Yung-Chi - Su-Lin City TW
Lin; Yung-Chi - New Taipei TW
Lin; Yung-Chi - Taipei County TW
Lin; Yung-Chi - Hsin-Chu TW
Lin; Yung-Chi - Su-Li TW
Lin; Yung-Chi - Su-Li City TW
Lin; Yung-Chi - Sun-Lin TW
Lin; Yung-Chi - Sun-Lin City TW
Lin; Yung-Chi - Taipei City TW

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Wafer bonding method Grant 11,437,344 - Lin , et al. September 6, 2	2022-09-06
Semiconductor structures and methods Grant 11,304,290 - Yu , et al. April 12, 2	2022-04-12
Positive-Pressure Protective Wear App 20210393995 - Lin; Yung Chi ; et al.	2021-12-23
Methods Of Forming Integrated Circuit Packages App 20210391306 - Hsu; Chia-Hao ; et al.	2021-12-16
Isolation Bonding Film for Semiconductor Packages and Methods of Forming the Same App 20210384158 - Chung; Ming-Tsu ; et al.	2021-12-09
Method of Forming Semiconductor Device Having Backside Interconnect Structure on Through Substrate Via App 20210335694 - Lin; Yung-Chi ; et al.	2021-10-28
Semiconductor Structure And Manufacturing Method Thereof App 20210327836 - Lin; Yung-Chi ; et al.	2021-10-21
Integrated Circuit Package And Method App 20210327866 - Yu; Chen-Hua ; et al.	2021-10-21
Integrated circuit packages and methods of forming the same Grant 11,145,623 - Hsu , et al. October 12, 2	2021-10-12
Wafer Bonding Method App 20210305200 - Lin; Yung-Chi ; et al.	2021-09-30
Isolation bonding film for semiconductor packages and methods of forming the same Grant 11,101,240 - Chung , et al. August 24, 2	2021-08-24
Semiconductor structure and manufacturing method thereof Grant 11,063,008 - Lin , et al. July 13, 2	2021-07-13
Semiconductor device having backside interconnect structure on through substrate via and method of forming the same Grant 11,056,419 - Lin , et al. July 6, 2	2021-07-06
3DIC Architecture with Interposer or Bonding Dies App 20210167018 - Hu; Hsien-Pin ; et al.	2021-06-03
Semiconductor Structure And Manufacturing Method Thereof App 20210082846 - Lin; Yung-Chi ; et al.	2021-03-18
Interconnect Structure and Method of Forming Same App 20210050316 - Lo; Hsiao Yun ; et al.	2021-02-18
Method for forming a 3D IC architecture including forming a first die on a first side of a first interconnect structure and a second die in an opening formed in a second side Grant 10,923,431 - Hu , et al. February 16, 2	2021-02-16
Isolation Bonding Film for Semiconductor Packages and Methods of Forming the Same App 20200411472 - Chung; Ming-Tsu ; et al.	2020-12-31
Integrated Circuit Packages And Methods Of Forming The Same App 20200395338 - Hsu; Chia-Hao ; et al.	2020-12-17
Die stack structure and method of fabricating the same Grant 10,867,963 - Hsu , et al. December 15, 2	2020-12-15
Method and structure of three-dimensional chip stacking Grant 10,867,985 - Yu , et al. December 15, 2	2020-12-15
Through Via Structure and Method App 20200343176 - Lin; Yung-Chi ; et al.	2020-10-29
Interconnect structure and method of forming same Grant 10,811,374 - Lo , et al. October 20, 2	2020-10-20
Die Stack Structure And Method Of Fabricating The Same App 20200294965 - Hsu; Chia-Hao ; et al.	2020-09-17
Through via structure and method Grant 10,714,423 - Lin , et al.	2020-07-14
Method and Structure of Three-Dimensional Chip Stacking App 20200043909 - Yu; Chen-Hua ; et al.	2020-02-06
Robust through-silicon-via structure Grant 10,535,586 - Lin , et al. Ja	2020-01-14
Semiconductor Device Having Backside Interconnect Structure on Through Substrate Via and Method of Forming the Same App 20200006201 - Lin; Yung-Chi ; et al.	2020-01-02
Method and structure of three-dimensional chip stacking Grant 10,515,940 - Yu , et al. Dec	2019-12-24
Semiconductor device having backside interconnect structure on through substrate via and method of forming the same Grant 10,510,641 - Lin , et al. Dec	2019-12-17
Method of manufacturing a semiconductor device including through silicon plugs Grant 10,497,619 - Yu , et al. De	2019-12-03
3DIC Architecture with Interposer for Bonding Dies App 20190273046 - Hu; Hsien-Pin ; et al.	2019-09-05
Robust through-silicon-via structure Grant 10,396,014 - Lin , et al. A	2019-08-27
Robust Through-Silicon-Via Structure App 20190259684 - Lin; Yung-Chi ; et al.	2019-08-22
3D IC architecture with interposer and interconnect structure for bonding dies Grant 10,297,550 - Hu , et al.	2019-05-21
Interconnect structure and method of forming same Grant 10,157,866 - Lo , et al. Dec	2018-12-18
Method Of Manufacturing A Semiconductor Device Including Through Silicon Plugs App 20180350678 - YU; Chen-Hua ; et al.	2018-12-06
Semiconductor Structures And Methods App 20180295717 - Yu; Chen-Hua ; et al.	2018-10-11
Method of using a wafer cassette to charge an electrostatic carrier Grant 10,068,789 - Chiou , et al. September 4, 2	2018-09-04
Method of manufacturing a semiconductor device including through silicon plugs Grant 10,049,931 - Yu , et al. August 14, 2	2018-08-14
Interconnection structure with confinement layer Grant 10,032,698 - Lo , et al. July 24, 2	2018-07-24
Robust Through-Silicon-Via Structure App 20180145012 - Lin; Yung-Chi ; et al.	2018-05-24
Through Via Structure and Method App 20180145022 - Lin; Yung-Chi ; et al.	2018-05-24
Interconnect Structure and Method of Forming Same App 20180145046 - Lo; Hsiao Yun ; et al.	2018-05-24
Through via structure and method Grant 9,978,607 - Lin , et al. May 22, 2	2018-05-22
Semiconductor manufacturing process and package carrier Grant 9,922,934 - Wang , et al. March 20, 2	2018-03-20
Method and Structure of Three-Dimensional Chip Stacking App 20180019236 - Yu; Chen-Hua ; et al.	2018-01-18
Robust through-silicon-via structure Grant 9,865,523 - Lin , et al. January 9, 2	2018-01-09
TSV formation processes using TSV-last approach Grant 9,847,255 - Lin , et al. December 19, 2	2017-12-19
Methods for forming a device having a capped through-substrate via structure Grant 9,847,256 - Lin , et al. December 19, 2	2017-12-19
Through via structure Grant 9,831,177 - Lin , et al. November 28, 2	2017-11-28
Semiconductor Manufacturing Process And Package Carrier App 20170317033 - Wang; Shih-Hui ; et al.	2017-11-02
Method and structure of three-dimensional chip stacking Grant 9,773,768 - Yu , et al. September 26, 2	2017-09-26
Interconnect Structure and Method of Forming Same App 20170271287 - Lo; Hsiao Yun ; et al.	2017-09-21
Interconnection Structure with Confinement Layer App 20170271242 - Lo; Hsiao Yun ; et al.	2017-09-21
Dummy structure for chip-on-wafer-on-substrate Grant 9,754,831 - Kuo , et al. September 5, 2	2017-09-05
Interconnect structure and method of forming same Grant 9,679,859 - Lo , et al. June 13, 2	2017-06-13
Interconnection structure with confinement layer Grant 9,673,132 - Lo , et al. June 6, 2	2017-06-06
Method Of Using A Wafer Cassette To Charge An Electrostatic Carrier App 20170103910 - Chiou; Wen-Chih ; et al.	2017-04-13
Method and Structure of Three-Dimensional Chip Stacking App 20170103973 - Yu; Chen-Hua ; et al.	2017-04-13
Device with Through-Substrate Via Structure and Method for Forming the Same App 20170084489 - Lin; Yung-Chi ; et al.	2017-03-23
Wafer cassette with electrostatic carrier charging scheme Grant 9,570,331 - Chiou , et al. February 14, 2	2017-02-14
Semiconductor Device Having Backside Interconnect Structure on Through Substrate Via and Method of Forming the Same App 20170011988 - Lin; Yung-Chi ; et al.	2017-01-12
Dummy Structure for Chip-on-Wafer-on-Substrate App 20160358818 - Kuo; Pei-Ching ; et al.	2016-12-08
Device with capped through-substrate via structure Grant 9,514,986 - Lin , et al. December 6, 2	2016-12-06
Semiconductor device having backside interconnect structure through substrate via and method of forming the same Grant 9,449,898 - Lin , et al. September 20, 2	2016-09-20
Dummy structure for chip-on-wafer-on-substrate Grant 9,425,126 - Kuo , et al. August 23, 2	2016-08-23
Method for forming package systems having interposers Grant 9,425,067 - Lin , et al. August 23, 2	2016-08-23
Through-substrate via formation with improved topography control Grant 9,418,933 - Lin , et al. August 16, 2	2016-08-16
TSV Formation Processes Using TSV-Last Approach App 20160225668 - Lin; Jing-Cheng ; et al.	2016-08-04
Method Of Manufacturing A Semiconductor Device Including Through Silicon Plugs App 20160197014 - YU; Chen-Hua ; et al.	2016-07-07
TSV structures and methods for forming the same Grant 9,373,575 - Lin , et al. June 21, 2	2016-06-21
TSV formation processes using TSV-last approach Grant 9,343,390 - Lin , et al. May 17, 2	2016-05-17
Interconnect Structure and Method of Forming Same App 20160118356 - Lo; Hsiao Yun ; et al.	2016-04-28
Method of manufacturing a semiconductor device including through silicon plugs Grant 9,287,440 - Yu , et al. March 15, 2	2016-03-15
Through Via Structure and Method App 20160071765 - Lin; Yung-Chi ; et al.	2016-03-10
Package Systems Having Interposers App 20160035588 - Lin; Yung-Chi ; et al.	2016-02-04
Wafer Cassette with Electrostatic Carrier Charging Scheme App 20160035609 - Chiou; Wen-Chih ; et al.	2016-02-04
Interconnect structure and method of forming same Grant 9,252,110 - Lo , et al. February 2, 2	2016-02-02
Through Via Structure App 20150357263 - Lin; Yung-Chi ; et al.	2015-12-10
Dummy Structure for Chip-on-Wafer-on-Substrate App 20150348872 - Kuo; Pei-Ching ; et al.	2015-12-03
Method of forming package systems having interposers Grant 9,171,815 - Lin , et al. October 27, 2	2015-10-27
Through-Substrate via Formation with Improved Topography Control App 20150249049 - Lin; Yung-Chi ; et al.	2015-09-03
Through via structure and method Grant 9,112,007 - Lin , et al. August 18, 2	2015-08-18
Interconnect Structure and Method of Forming Same App 20150206846 - Lo; Hsiao Yun ; et al.	2015-07-23
Robust Through-Silicon-Via Structure App 20150206823 - Lin; Yung-Chi ; et al.	2015-07-23
Through-substrate via formation with improved topography control Grant 9,064,850 - Lin , et al. June 23, 2	2015-06-23
Novel Semiconductor Package With Through Silicon Vias App 20150147834 - Yu; Chen-Hua ; et al.	2015-05-28
TSV Structures and Methods for Forming the Same App 20150137360 - Lin; Yung-Chi ; et al.	2015-05-21
Through silicon via with embedded barrier pad Grant 8,980,741 - Lin , et al. March 17, 2	2015-03-17
Device with Through-Substrate Via Structure and Method for Forming the Same App 20150061147 - Lin; Yung-Chi ; et al.	2015-03-05
Interconnection Structure with Confinement Layer App 20150054174 - Lo; Hsiao Yun ; et al.	2015-02-26
TSV structures and methods for forming the same Grant 8,956,966 - Lin , et al. February 17, 2	2015-02-17
Semiconductor Device Having Backside Interconnect Structure On Through Substrate Via And Method Of Forming The Same App 20150035159 - Lin; Yung-Chi ; et al.	2015-02-05
Semiconductor package with through silicon vias Grant 8,946,742 - Yu , et al. February 3, 2	2015-02-03
Package Systems Having Interposers App 20150011051 - Lin; Yung-Chi ; et al.	2015-01-08
TSV Structures and Methods for Forming the Same App 20140342547 - Lin; Yung-Chi ; et al.	2014-11-20
Package systems having interposers with interconnection structures Grant 8,866,301 - Lin , et al. October 21, 2	2014-10-21
Process of forming through-silicon via structure Grant 8,846,523 - Wu , et al. September 30, 2	2014-09-30
Through Silicon Via with Embedded Barrier Pad App 20140287581 - Lin; Yung-Chi ; et al.	2014-09-25
Cost-effective TSV formation Grant 8,836,085 - Yang , et al. September 16, 2	2014-09-16
TSV structures and methods for forming the same Grant 8,803,316 - Lin , et al. August 12, 2	2014-08-12
Through-silicon via structure formation process Grant 8,791,011 - Lin , et al. July 29, 2	2014-07-29
Through silicon via with embedded barrier pad Grant 8,772,945 - Lin , et al. July 8, 2	2014-07-08
Through-Substrate via Formation with Improved Topography Control App 20140131884 - Lin; Yung-Chi ; et al.	2014-05-15
Through Via Structure and Method App 20140077374 - Lin; Yung-Chi ; et al.	2014-03-20
Cost-Effective TSV Formation App 20140008802 - Yang; Ku-Feng ; et al.	2014-01-09
Method Of Manufacturing A Semiconductor Device Including Through Silicon Plugs App 20130302979 - YU; Chen-Hua ; et al.	2013-11-14
Cost-effective TSV formation Grant 8,580,682 - Yang , et al. November 12, 2	2013-11-12
Through Silicon Via with Embedded Barrier Pad App 20130285244 - Lin; Yung-Chi ; et al.	2013-10-31
Process Of Forming Through-silicon Via Structure App 20130224909 - WU; Weng-Jin ; et al.	2013-08-29
Heat dissipation by through silicon plugs Grant 8,507,940 - Yu , et al. August 13, 2	2013-08-13
Through-silicon Via Structure Formation Process App 20130171772 - LIN; Yung-Chi ; et al.	2013-07-04
TSV Structures and Methods for Forming the Same App 20130140690 - Lin; Yung-Chi ; et al.	2013-06-06
Through-silicon via structure and a process for forming the same Grant 8,432,038 - Wu , et al. April 30, 2	2013-04-30
TSV Formation Processes Using TSV-Last Approach App 20130093042 - Lin; Jing-Chen ; et al.	2013-04-18
Through-silicon via structure Grant 8,405,201 - Lin , et al. March 26, 2	2013-03-26
TSV formation processes using TSV-last approach Grant 8,338,939 - Lin , et al. December 25, 2	2012-12-25
Cost-Effective TSV Formation App 20120083116 - Yang; Ku-Feng ; et al.	2012-04-05
Thermally Efficient Packaging For A Photonic Device App 20120068218 - Chang; Hung-Pin ; et al.	2012-03-22
TSV Formation Processes Using TSV-Last Approach App 20120007154 - Lin; Jing-Cheng ; et al.	2012-01-12
Package Systems Having Interposers App 20110285005 - LIN; Yung-Chi ; et al.	2011-11-24
Heat Dissipation By Through Silicon Plugs App 20110241061 - YU; Chen-Hua ; et al.	2011-10-06
Novel Semiconductor Package With Through Silicon Vias App 20110241040 - YU; Chen-Hua ; et al.	2011-10-06
3DIC Architecture with Interposer for Bonding Dies App 20110193221 - Hu; Hsien-Pin ; et al.	2011-08-11
Through-silicon Via Structure And A Process For Forming The Same App 20110108986 - LIN; Yung-Chi ; et al.	2011-05-12
Through-silicon Via Structure And A Process For Forming The Same App 20100314758 - WU; Weng-Jin ; et al.	2010-12-16
Power system using water as fuel App 20090148734 - Wang; Ruey-Li ; et al.	2009-06-11