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Patent applications and USPTO patent grants for LIN; Kuei-Lun.The latest application filed is for "method for forming semiconductor device structure with gate".
Patent | Date |
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Formation Of Transistor Gates App 20220285528 - CHIU; Yen-Jui ;   et al. | 2022-09-08 |
Method For Forming Semiconductor Device Structure With Gate App 20220285160 - LIN; Kuei-Lun ;   et al. | 2022-09-08 |
Semiconductor Device and Method App 20220246433 - Lin; Kuei-Lun ;   et al. | 2022-08-04 |
Triple Layer High-K Gate Dielectric Stack for Workfunction Engineering App 20210399104 - Chang; Chia-Yuan ;   et al. | 2021-12-23 |
Multi-Layer High-K Gate Dielectric Structure App 20210305258 - Hsu; Chih-Yu ;   et al. | 2021-09-30 |
Methods of forming semiconductor devices and FinFET devices having shielding layers Grant 11,107,897 - Chang , et al. August 31, 2 | 2021-08-31 |
Gate Structure Of A Semiconductor Device And Method Of Forming Same App 20210126101 - Lin; Kuei-Lun ;   et al. | 2021-04-29 |
Methods Of Forming Semiconductor Devices And Finfet Devices App 20210028285 - Chang; Che-Hao ;   et al. | 2021-01-28 |
Semiconductor devices and FinFET devices having shielding layers Grant 10,367,078 - Chang , et al. July 30, 2 | 2019-07-30 |
Semiconductor Devices, Finfet Devices And Methods Of Forming The Same App 20190140082 - Chang; Chia-Yuan ;   et al. | 2019-05-09 |
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