Lin; Jyuh-Fuh

Patent Applications and Registrations

Patent applications and USPTO patent grants for Lin; Jyuh-Fuh.The latest application filed is for "method of fabricating an integrated circuit with a pattern density-outlier-treatment for optimized pattern density uniformity".

Company Profile

7.12.12

Lin; Jyuh-Fuh - Miaoli County TW
Lin; Jyuh-Fuh - Chunan Township TW
Lin; Jyuh-Fuh - Chunan Township, Miaoli County N/A TW

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Method of fabricating an integrated circuit with non-printable dummy features Grant 11,061,317 - Lin , et al. July 13, 2	2021-07-13
Method of fabricating an integrated circuit with a pattern density-outlier-treatment for optimized pattern density uniformity Grant 10,811,225 - Lin , et al. October 20, 2	2020-10-20
Method Of Fabricating An Integrated Circuit With A Pattern Density-outlier-treatment For Optimized Pattern Density Uniformity App 20200027699 - LIN; Jyuh-Fuh ; et al.	2020-01-23
Method of Fabricating an Integrated Circuit with Non-Printable Dummy Features App 20190339610 - Lin; Jyuh-Fuh ; et al.	2019-11-07
Method of fabricating an integrated circuit with a pattern density-outlier-treatment for optimized pattern density uniformity Grant 10,431,423 - Lin , et al. O	2019-10-01
Method of fabricating an integrated circuit with non-printable dummy features Grant 10,359,695 - Lin , et al.	2019-07-23
Method Of Fabricating An Integrated Circuit With A Pattern Density-outlier-treatment For Optimized Pattern Density Uniformity App 20190214227 - LIN; Jyuh-Fuh ; et al.	2019-07-11
Method of fabricating an integrated circuit with a pattern density-outlier-treatment for optimized pattern density uniformity Grant 10,170,276 - Lin , et al. J	2019-01-01
Method Of Fabricating An Integrated Circuit With A Pattern Density-outlier-treatment For Optimized Pattern Density Uniformity App 20170186584 - LIN; Jyuh-Fuh ; et al.	2017-06-29
Method of Fabricating an Integrated Circuit With Non-Printable Dummy Features App 20170176849 - LIN; JYUH-FUH ; et al.	2017-06-22
System and technique for rasterizing circuit layout data Grant 9,658,538 - Liu , et al. May 23, 2	2017-05-23
Method of fabricating an integrated circuit with non-printable dummy features Grant 9,594,862 - Lin , et al. March 14, 2	2017-03-14
Method of fabricating an integrated circuit with a pattern density-outlier-treatment for optimized pattern density uniformity Grant 9,552,964 - Lin , et al. January 24, 2	2017-01-24
Method of fabricating an integrated circuit with block dummy for optimized pattern density uniformity Grant 9,436,788 - Lin , et al. September 6, 2	2016-09-06
Method of fabricating an integrated circuit with optimized pattern density uniformity Grant 9,436,787 - Lin , et al. September 6, 2	2016-09-06
System And Technique For Rasterizing Circuit Layout Data App 20160180005 - Liu; Pei-Yi ; et al.	2016-06-23
Method of Fabricating an Integrated Circuit with Non-Printable Dummy Features App 20150370942 - Lin; Jyuh-Fuh ; et al.	2015-12-24
Method of Fabricating an Integrated Circuit with a Pattern Density-Outlier-Treatment for Optimized Pattern Density Uniformity App 20150371821 - Lin; Jyuh-Fuh ; et al.	2015-12-24
Method of Fabricating an Integrated Circuit with Block Dummy for Optimized Pattern Density Uniformity App 20150294057 - Lin; Jyuh-Fuh ; et al.	2015-10-15
Method of Fabricating an Integrated Circuit with Optimized Pattern Density Uniformity App 20150294056 - Lin; Jyuh-Fuh ; et al.	2015-10-15
Detecting method for forming semiconductor device Grant 8,755,045 - Lin , et al. June 17, 2	2014-06-17
Detecting Method For Forming Semiconductor Device App 20130176558 - Lin; Jyuh-Fuh ; et al.	2013-07-11

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