loadpatents
name:-0.019096851348877
name:-0.028517007827759
name:-0.0017020702362061
Lin; Hwong-Kwo Patent Filings

Lin; Hwong-Kwo

Patent Applications and Registrations

Patent applications and USPTO patent grants for Lin; Hwong-Kwo.The latest application filed is for "mixed threshold flip-flop element to mitigate hold time penalty due to clock distortion".

Company Profile
1.27.19
  • Lin; Hwong-Kwo - Santa Clara CA
  • Lin; Hwong-Kwo - Palo Alto CA
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Write assist negative bit line voltage generator for SRAM array
Grant 10,672,461 - Gong , et al.
2020-06-02
Mixed threshold flip-flop element to mitigate hold time penalty due to clock distortion
Grant 10,181,842 - Yang , et al. Ja
2019-01-15
Mitigating external influences on long signal lines
Grant 9,842,631 - Yang , et al. December 12, 2
2017-12-12
Mixed Threshold Flip-flop Element To Mitigate Hold Time Penalty Due To Clock Distortion
App 20170141768 - YANG; Ge ;   et al.
2017-05-18
SRAM core cell design with write assist
Grant 9,542,992 - Lin , et al. January 10, 2
2017-01-10
Low clocking power flip-flop
Grant 9,525,401 - Zhang , et al. December 20, 2
2016-12-20
Power Savings Via Selection Of Sram Power Source
App 20160336054 - FELIX; Stephen ;   et al.
2016-11-17
Memory cell and memory
Grant 9,496,047 - Yang , et al. November 15, 2
2016-11-15
Power savings via selection of SRAM power source
Grant 9,484,115 - Felix , et al. November 1, 2
2016-11-01
Low Clocking Power Flip-flop
App 20160269002 - Zhang; Xi ;   et al.
2016-09-15
Configurable delay circuit and method of clock buffering
Grant 9,390,788 - Lin , et al. July 12, 2
2016-07-12
Hybrid approach to write assist for memory array
Grant 9,355,710 - Gong , et al. May 31, 2
2016-05-31
Low tau synchronizer flip-flop with dual loop feedback approach to improve mean time between failure
Grant 9,219,480 - Lin , et al. December 22, 2
2015-12-22
Configurable Delay Circuit And Method Of Clock Buffering
App 20150332757 - Lin; Hwong-Kwo ;   et al.
2015-11-19
Eight transistor (8T) write assist static random access memory (SRAM) cell
Grant 9,183,922 - Yang , et al. November 10, 2
2015-11-10
Configurable delay circuit and method of clock buffering
Grant 9,123,438 - Lin , et al. September 1, 2
2015-09-01
Pseudo-differential Read Scheme For Dual Port Ram
App 20150235681 - Chen; Gang ;   et al.
2015-08-20
Flip-flop circuit having a reduced hold time requirement for a scan input
Grant 9,110,141 - Lin , et al. August 18, 2
2015-08-18
Low Tau Synchronizer Flip-flop With Dual Loop Feedback Approach To Improve Mean Time Between Failure
App 20150222266 - Lin; Hwong-Kwo ;   et al.
2015-08-06
Negative Bit Line Write Assist For Memory Array
App 20150206576 - Gong; Haiyan ;   et al.
2015-07-23
Hybrid Approach To Write Assist For Memory Array
App 20150206577 - Gong; Haiyan ;   et al.
2015-07-23
Configurable Delay Circuit And Method Of Clock Buffering
App 20150103584 - Lin; Hwong-Kwo ;   et al.
2015-04-16
Small area low power data retention flop
Grant 8,988,123 - Yang , et al. March 24, 2
2015-03-24
Eight Transistor (8t) Write Assist Static Random Access Memory (sram) Cell
App 20140347916 - Yang; Jun ;   et al.
2014-11-27
Sram Core Cell Design With Write Assist
App 20140313817 - LIN; Hwong-Kwo ;   et al.
2014-10-23
Dual flip-flop circuit
Grant 8,866,528 - Lin , et al. October 21, 2
2014-10-21
Small Area Low Power Data Retention Flop
App 20140167828 - Yang; Ge ;   et al.
2014-06-19
Mitigating External Influences On Long Signal Lines
App 20140169108 - Yang; Ge ;   et al.
2014-06-19
Dual Flip-flop Circuit
App 20140125377 - Lin; Hwong-Kwo ;   et al.
2014-05-08
Flip-flop Circuit Having A Reduced Hold Time Requirement For A Scan Input
App 20140129887 - Lin; Hwong-Kwo ;   et al.
2014-05-08
Memory Cell And Memory
App 20140056050 - YANG; Jun ;   et al.
2014-02-27
Low power single rail input voltage level shifter
Grant 7,839,170 - Yang , et al. November 23, 2
2010-11-23
Low power single-rail-input voltage level shifter
Grant 7,830,175 - Lin , et al. November 9, 2
2010-11-09
Level shifter circuit to shift signals from a logic voltage to an input/output voltage
Grant 7,772,885 - Lin , et al. August 10, 2
2010-08-10
Process variation tolerant sense amplifier flop design
Grant 7,768,320 - Yang , et al. August 3, 2
2010-08-03
Area efficient high performance memory cell
Grant 7,649,762 - Lin , et al. January 19, 2
2010-01-19
Sequentially-accessed 1R/1W double-pumped single port SRAM with shared decoder architecture
Grant 7,643,330 - Lin , et al. January 5, 2
2010-01-05
Active bit line charge keeper
Grant 7,626,878 - Lin , et al. December 1, 2
2009-12-01
Apparatus and method for preventing current leakage when a low voltage domain is powered down
Grant 7,583,126 - Yang , et al. September 1, 2
2009-09-01
Generic flexible timer design
Grant 7,504,872 - Lin , et al. March 17, 2
2009-03-17
Generic Flexible Timer Design
App 20090045847 - Lin; Hwong-Kwo ;   et al.
2009-02-19
Generic flexible timer design
Grant 7,492,204 - Lin , et al. February 17, 2
2009-02-17
Low power single-rail-input voltage level shifter
Grant 7,463,065 - Lin , et al. December 9, 2
2008-12-09
Apparatus And Method For Preventing Current Leakage When A Low Voltage Domain Is Powered Down
App 20080290935 - Yang; Ge ;   et al.
2008-11-27

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