Lin; Da-Wen

Patent Applications and Registrations

Patent applications and USPTO patent grants for Lin; Da-Wen.The latest application filed is for "multi-gate device and related methods".

Company Profile

10.60.60

Lin; Da-Wen - Hsinchu County TW
LIN; Da-Wen - Hsinchu City TW
LIN; Da-Wen - Taipei City TW
Lin; Da-Wen - Hsinchu TW
Lin; Da-Wen - Taiwan TW
Lin; Da-Wen - Hsin-Chu TW
- Hsinchu TW
Lin; Da-Wen - Taiping TW
Lin; Da-Wen - Taiping City TW
Lin; Da-Wen - Taipin TW
Lin; Da-Wen - Taichung TW
Lin; Da-Wen - Taipin City TW

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Source/drain Contact With Low-k Contact Etch Stop Layer And Method Of Fabricating Thereof App 20220285513 - Chen; Ting-Yeh ; et al.	2022-09-08
Multi-gate Device And Related Methods App 20220285533 - LEE; Tsung-Lin ; et al.	2022-09-08
Device And Method Of Fabricating Multigate Devices Having Different Channel Configurations App 20220238678 - LEE; Tsung-Lin ; et al.	2022-07-28
Finfet Fabrication Methods App 20220208986 - TSAI; Chun Hsiung ; et al.	2022-06-30
FinFET fabrication methods Grant 11,276,766 - Tsai , et al. March 15, 2	2022-03-15
Formation of dislocations in source and drain regions of FinFET devices Grant 11,211,455 - Tsai , et al. December 28, 2	2021-12-28
FinFET Device with Different Liners for PFET and NFET and Method of Fabricating Thereof App 20210366784 - Cheng; Ming-Lung ; et al.	2021-11-25
Two-transistor bandgap reference circuit and FinFET device suited for same Grant 11,150,680 - Lin , et al. October 19, 2	2021-10-19
FinFET device with different liners for PFET and NFET and method of fabricating thereof Grant 11,031,299 - Cheng , et al. June 8, 2	2021-06-08
Formation of Dislocations in Source and Drain Regions of FinFET Devices App 20200350404 - Tsai; Chun Hsiung ; et al.	2020-11-05
Formation of dislocations in source and drain regions of finFET devices Grant 10,741,642 - Tsai , et al. A	2020-08-11
Finfet Fabrication Methods App 20200066869 - TSAI; Chun Hsiung ; et al.	2020-02-27
Fin Field Effect Transistor (finfet) Device Structure With Deep Contact Structure App 20200058747 - FANG; Ting ; et al.	2020-02-20
Two-transistor Bandgap Reference Circuit And Finfet Device Suited For Same App 20200019201 - Lin; Yvonne ; et al.	2020-01-16
Two-transistor bandgap reference circuit and FinFET device suited for same Grant 10,534,393 - Lin , et al. January 14, 2	2020-01-14
FinFET device with different liners for PFET and NFET and method of fabricating thereof Grant 10,522,417 - Cheng , et al. Dec	2019-12-31
Two-transistor bandgap reference circuit and FinFET device suited for same Grant 10,466,731 - Lin , et al. No	2019-11-05
FinFET fabrication methods Grant 10,468,500 - Tsai , et al. No	2019-11-05
Formation of Dislocations in Source and Drain Regions of FinFET Devices App 20190115428 - Tsai; Chun Hsiung ; et al.	2019-04-18
Two-transistor Bandgap Reference Circuit And Finfet Device Suited For Same App 20180356852 - Lin; Yvonne ; et al.	2018-12-13
Formation of dislocations in source and drain regions of FinFET devices Grant 10,153,344 - Tsai , et al. Dec	2018-12-11
Finfet Device With Different Liners For Pfet And Nfet And Method Of Fabricating Thereof App 20180350697 - Cheng; Ming-Lung ; et al.	2018-12-06
Finfet Device With Different Liners For Pfet And Nfet And Method Of Fabricating Thereof App 20180315664 - Cheng; Ming-Lung ; et al.	2018-11-01
Formation of Dislocations in Source and Drain Regions of FinFET Devices App 20180006117 - Tsai; Chun Hsiung ; et al.	2018-01-04
Method and apparatus of forming an integrated circuit with a strained channel region Grant 9,768,277 - Cheng , et al. September 19, 2	2017-09-19
Formation of dislocations in source and drain regions of FinFET devices Grant 9,768,256 - Tsai , et al. September 19, 2	2017-09-19
Two-transistor Bandgap Reference Circuit And Finfet Device Suited For Same App 20170212545 - Lin; Yvonne ; et al.	2017-07-27
Methods of annealing after deposition of gate layers Grant 9,620,386 - Tsai , et al. April 11, 2	2017-04-11
FinFET with multiple dislocation planes and method for forming the same Grant 9,590,101 - Huang , et al. March 7, 2	2017-03-07
Semiconductor device structure and method for forming the same Grant 9,537,010 - Wang , et al. January 3, 2	2017-01-03
FinFET with Multiple Dislocation Planes and Method for Forming the Same App 20160268429 - Huang; Chih-Hsiang ; et al.	2016-09-15
Semiconductor Device Structure And Method For Forming The Same App 20160225906 - WANG; Tsan-Chun ; et al.	2016-08-04
Formation of Dislocations in Source and Drain Regions of FinFET Devices App 20160204229 - Tsai; Chun Hsiung ; et al.	2016-07-14
FinFET with Multiple Dislocation Planes and Method for Forming the Same App 20160190129 - Huang; Chih-Hsiang ; et al.	2016-06-30
Multiple-gate semiconductor device and method Grant 9,373,704 - Lee , et al. June 21, 2	2016-06-21
FinFET with multiple dislocation planes and method for forming the same Grant 9,362,278 - Huang , et al. June 7, 2	2016-06-07
Formation of dislocations in source and drain regions of FinFET devices Grant 9,293,534 - Tsai , et al. March 22, 2	2016-03-22
Integrated circuit resistor Grant 9,281,356 - Wong , et al. March 8, 2	2016-03-08
Device with Engineered Epitaxial Region and Methods of Making Same App 20150364602 - Wong; King-Yuen ; et al.	2015-12-17
Method and Apparatus For Enhancing Channel Strain App 20150340293 - Cheng; Ming-Lung ; et al.	2015-11-26
Formation of Dislocations in Source and Drain Regions of FinFET Devices App 20150270342 - Tsai; Chun Hsiung ; et al.	2015-09-24
Device with engineered epitaxial region and methods of making same Grant 9,117,843 - Wong , et al. August 25, 2	2015-08-25
Method for enhancing channel strain Grant 9,105,664 - Cheng , et al. August 11, 2	2015-08-11
Integrated Circuit Resistor App 20150111361 - Wong; King-Yuen ; et al.	2015-04-23
Multiple-Gate Semiconductor Device and Method App 20150079753 - Lee; Tung Ying ; et al.	2015-03-19
Semiconductor structure Grant 8,951,875 - Wong , et al. February 10, 2	2015-02-10
Integrated circuit resistor Grant 08921946 -	2014-12-30
Integrated circuit resistor Grant 8,921,946 - Wong , et al. December 30, 2	2014-12-30
Multiple-gate semiconductor device and method Grant 8,895,383 - Lee , et al. November 25, 2	2014-11-25
Methods Of Annealing After Deposition Of Gate Layers App 20140335685 - TSAI; Chun Hsiung ; et al.	2014-11-13
Method And Apparatus For Enhancing Channel Strain App 20140248751 - Cheng; Ming-Lung ; et al.	2014-09-04
Methods of anneal after deposition of gate layers Grant 8,809,175 - Tsai , et al. August 19, 2	2014-08-19
Techniques for FinFET doping Grant 8,785,286 - Tsai , et al. July 22, 2	2014-07-22
Transistor having notched fin structure and method of making the same Grant 8,759,943 - Tseng , et al. June 24, 2	2014-06-24
Rapid thermal annealing to reduce pattern effect Grant 8,753,980 - Tsai , et al. June 17, 2	2014-06-17
Strained channel integrated circuit devices Grant 8,729,627 - Cheng , et al. May 20, 2	2014-05-20
Techniques for FinFET doping Grant 8,703,593 - Tsai , et al. April 22, 2	2014-04-22
Techniques for FinFET Doping App 20130280876 - Tsai; Chun Hsiung ; et al.	2013-10-24
FinFET LDD and source drain implant technique Grant 8,557,692 - Tsai , et al. October 15, 2	2013-10-15
Multiple-Gate Semiconductor Device and Method App 20130230958 - Lee; Tung Ying ; et al.	2013-09-05
Device With Self Aligned Stressor And Method Of Making Same App 20130161650 - LAI; Kao-Ting ; et al.	2013-06-27
Rapid Thermal Annealing To Reduce Pattern Effect App 20130143418 - TSAI; Chun Hsiung ; et al.	2013-06-06
Integrated Circuit Resistor App 20130119480 - Wong; King-Yuen ; et al.	2013-05-16
Semiconductor Structure App 20130099326 - WONG; King-Yuen ; et al.	2013-04-25
Multiple-gate semiconductor device and method Grant 8,426,923 - Lee , et al. April 23, 2	2013-04-23
Device with self aligned stressor and method of making same Grant 8,404,538 - Lai , et al. March 26, 2	2013-03-26
Device with Engineered Epitaxial Region and Methods of Making Same App 20130062670 - Wong; King-Yuen ; et al.	2013-03-14
Asymmetric rapid thermal annealing to reduce pattern effect Grant 8,383,513 - Tsai , et al. February 26, 2	2013-02-26
Methods of forming integrated circuits Grant 8,357,579 - Wong , et al. January 22, 2	2013-01-22
Methods Of Anneal After Deposition Of Gate Layers App 20130017678 - TSAI; Chun Hsiung ; et al.	2013-01-17
Multi-threshold voltage device and method of making same Grant 8,283,734 - Chiang , et al. October 9, 2	2012-10-09
High surface dopant concentration semiconductor device and method of fabricating Grant 8,278,196 - Huang , et al. October 2, 2	2012-10-02
LDD epitaxy for FinFETs Grant 8,278,179 - Lin , et al. October 2, 2	2012-10-02
Methods Of Forming Integrated Circuits App 20120135575 - WONG; King-Yuen ; et al.	2012-05-31
Transistor Having Notched Fin Structure And Method Of Making The Same App 20120086053 - TSENG; Chih-Hung ; et al.	2012-04-12
Asymmetric Rapid Thermal Annealing To Reduce Pattern Effect App 20120083135 - TSAI; Chun Hsiung ; et al.	2012-04-05
Gated diode with non-planar source region Grant 8,143,680 - Lin , et al. March 27, 2	2012-03-27
High Surface Dopant Concentration Semiconductor Device And Method Of Fabricating App 20120018848 - Huang; Yu-Lien ; et al.	2012-01-26
Method And Apparatus For Enhancing Channel Strain App 20110278676 - Cheng; Ming-Lung ; et al.	2011-11-17
Piezoelectric Gate-Induced Strain App 20110248322 - Wong; King-Yuen ; et al.	2011-10-13
Multi-threshold Voltage Device And Method Of Making Same App 20110248351 - Chiang; Chung-Yu ; et al.	2011-10-13
LDD Epitaxy for FinFETs App 20110223736 - Lin; Da-Wen ; et al.	2011-09-15
Techniques for FinFET Doping App 20110195555 - Tsai; Chun Hsiung ; et al.	2011-08-11
Method for obtaining quality ultra-shallow doped regions and device having same Grant 7,994,016 - Tsai , et al. August 9, 2	2011-08-09
FinFET LDD and Source Drain Implant Technique App 20110171795 - Tsai; Chun Hsiung ; et al.	2011-07-14
Multiple-Gate Semiconductor Device and Method App 20110127610 - Lee; Tung Ying ; et al.	2011-06-02
Method For Obtaining Quality Ultra-shallow Doped Regions And Device Having Same App 20110111571 - TSAI; Chun Hsiung ; et al.	2011-05-12
Device With Self Aligned Stressor And Method Of Making Same App 20110079820 - Lai; Kao-Ting ; et al.	2011-04-07
Gated Diode with Non-Planar Source Region App 20100237441 - Lin; Da-Wen ; et al.	2010-09-23
Flash anneal for a PAI, NiSi process Grant 7,795,119 - Lo , et al. September 14, 2	2010-09-14
Gated diode with non-planar source region Grant 7,732,877 - Lin , et al. June 8, 2	2010-06-08
Flash Anneal for a PAI, NiSi Process App 20090020757 - Lo; Chia Ping ; et al.	2009-01-22
Semiconductor Device With Raised Spacers App 20080290380 - Sheu; Yi-Ming ; et al.	2008-11-27
Gated diode with non-planar source region App 20080237746 - Lin; Da-Wen ; et al.	2008-10-02
Narrow width effect improvement with photoresist plug process and STI corner ion implantation Grant 7,399,679 - Sheu , et al. July 15, 2	2008-07-15
Silicon oxycarbide and silicon carbonitride based materials for MOS devices Grant 7,115,974 - Wu , et al. October 3, 2	2006-10-03
Narrow width effect improvement with photoresist plug process and STI corner ion implantation Grant 7,071,515 - Sheu , et al. July 4, 2	2006-07-04
Narrow width effect improvement with photoresist plug process and STI corner ion implantation App 20060079068 - Sheu; Yi-Ming ; et al.	2006-04-13
Recessed gate structure with reduced current leakage and overlap capacitance Grant 7,012,014 - Lin , et al. March 14, 2	2006-03-14
Silicon oxycarbide and silicon carbonitride based materials for MOS devices App 20050236694 - Wu, Zhen-Cheng ; et al.	2005-10-27
Recessed gate structure with reduced current leakage and overlap capacitance App 20050127433 - Lin, Da-Wen ; et al.	2005-06-16
Narrow width effect improvement with photoresist plug process and STI corner ion implantation App 20050012173 - Sheu, Yi-Ming ; et al.	2005-01-20
Damascene gate electrode method for fabricating field effect transistor (FET) device with ion implanted lightly doped extension regions Grant 6,673,683 - Sheu , et al. January 6, 2	2004-01-06
Planarizing method for fabricating gate electrodes Grant 6,670,226 - Lin , et al. December 30, 2	2003-12-30
Planarizing method for fabricating gate electrodes App 20030170994 - Lin, Yo-Sheng ; et al.	2003-09-11