Lin; Chia-Pin

Patent Applications and Registrations

Patent applications and USPTO patent grants for Lin; Chia-Pin.The latest application filed is for "semiconductor devices with enhanced carrier mobility".

Company Profile

6.40.51

Lin; Chia-Pin - Hsinchu County TW
Lin; Chia-Pin - Xinpu Township TW
Lin; Chia Pin - Changhua TW
LIN; Chia Pin - Changhua City TW
Lin; Chia-Pin - Hsin-Chu TW
- Xinpu Township, Hsinchu County TW
Lin; Chia-Pin - Xinpu Township, Hsinchu County N/A TW
Lin; Chia-Pin - New Taipei TW
Lin; Chia-Pin - Tu-Cheng TW
Lin; Chia-Pin - Hsinchu TW
Lin; Chia-Pin - Sinpu Township TW
Lin, Chia-Pin - Taipei County TW
Lin, Chia-Pin - Sanchung TW

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Semiconductor Devices With Enhanced Carrier Mobility App 20220310840 - Li; Ming-Shuan ; et al.	2022-09-29
Nano-fet Semiconductor Device And Method Of Forming App 20220310816 - Wong; I-Hsieh ; et al.	2022-09-29
Integrated circuit structure with backside dielectric layer having air gap Grant 11,450,559 - Chang , et al. September 20, 2	2022-09-20
Inner spacer liner Grant 11,444,178 - Yin , et al. September 13, 2	2022-09-13
Source/drain Contact With Low-k Contact Etch Stop Layer And Method Of Fabricating Thereof App 20220285513 - Chen; Ting-Yeh ; et al.	2022-09-08
Semiconductor Device with Backside Contact and Methods of Forming Such App 20220285510 - Chen; Ting-Yeh ; et al.	2022-09-08
Semiconductor Structure With Gate-all-around Devices And Stacked Finfet Devices App 20220262683 - Chu; Feng-Ching ; et al.	2022-08-18
Semiconductor devices including backside vias and methods of forming the same Grant 11,417,767 - Chang , et al. August 16, 2	2022-08-16
Inner Spacer Features for Multi-Gate Transistors App 20220223718 - Wu; Bone-Fong ; et al.	2022-07-14
Method and structure for air gap inner spacer in gate-all-around devices Grant 11,374,128 - Chen , et al. June 28, 2	2022-06-28
Inner Spacer Liner App 20220157969 - Yin; Jin-Mu ; et al.	2022-05-19
Semiconductor structure with gate-all-around devices and stacked FinFET devices Grant 11,328,960 - Chu , et al. May 10, 2	2022-05-10
Lightly-doped Channel Extensions App 20220131014 - Lai; Wei-Jen ; et al.	2022-04-28
Semiconductor Device with Leakage Current Suppression and Method for Forming the Same App 20220122893 - Lai; Bo-Yu ; et al.	2022-04-21
Inner spacer features for multi-gate transistors Grant 11,289,584 - Wu , et al. March 29, 2	2022-03-29
Semiconductor Structure With Gate-all-around Devices And Stacked Finfet Devices App 20220093591 - Chu; Feng-Ching ; et al.	2022-03-24
Epitaxial Features App 20220069135 - Chu; Feng-Ching ; et al.	2022-03-03
Epitaxial Source/Drain Feature with Enlarged Lower Section Interfacing with Backside Via App 20210391421 - Chu; Feng-Ching ; et al.	2021-12-16
Semiconductor Devices Including Backside Vias and Methods of Forming the Same App 20210376155 - Chang; Che-Lun ; et al.	2021-12-02
Semiconductor Devices And Methods Of Forming The Same App 20210376094 - Lin; Yen-Po ; et al.	2021-12-02
Integrated Circuit Structure With Backside Dielectric Layer Having Air Gap App 20210343578 - Chang; Che-Lun ; et al.	2021-11-04
Inner Spacer Features for Multi-Gate Transistors App 20210336034 - Wu; Bone-Fong ; et al.	2021-10-28
Semiconductor Device With Epitaxial Bridge Feature And Methods Of Forming The Same App 20210273114 - Chen; Ting-Yeh ; et al.	2021-09-02
Method and Structure for Gate-All-Around Devices App 20210273103 - Chen; Shih-Chiang ; et al.	2021-09-02
Cut EPI Process and Structures App 20210272848 - Chu; Feng-Ching ; et al.	2021-09-02
Method Of Making A Finfet, And Finfet Formed By The Method App 20190181048 - LIN; Chia-Pin ; et al.	2019-06-13
Method of making a finFET, and finFET formed by the method Grant 10,224,245 - Lin , et al.	2019-03-05
Anti-roll bar device with variable rigidity Grant 10,118,457 - Yang , et al. November 6, 2	2018-11-06
Anti-roll Bar Device With Variable Rigidity App 20170106714 - YANG; Chun-Pin ; et al.	2017-04-20
Method Of Making A Finfet, And Finfet Formed By The Method App 20160204255 - LIN; Chia-Pin ; et al.	2016-07-14
Fabrication methods of integrated semiconductor structure Grant 9,349,657 - Wang , et al. May 24, 2	2016-05-24
Method of making a finFET, and finFET formed by the method Grant 9,312,179 - Lin , et al. April 12, 2	2016-04-12
Integrated circuit resistor Grant 9,281,356 - Wong , et al. March 8, 2	2016-03-08
Plasma doping to reduce dielectric loss during removal of dummy layers in a gate structure Grant 9,281,307 - Huang , et al. March 8, 2	2016-03-08
Dual epitaxial process for a finFET device Grant 9,224,737 - Chen , et al. December 29, 2	2015-12-29
Dual Epitaxial Process For A Finfet Device App 20150115322 - CHEN; Hung-Kai ; et al.	2015-04-30
Integrated Circuit Resistor App 20150111361 - Wong; King-Yuen ; et al.	2015-04-23
Hybrid gate process for fabricating FinFET device Grant 8,994,116 - Gan , et al. March 31, 2	2015-03-31
Dual epitaxial process for a finFET device Grant 8,937,353 - Chen , et al. January 20, 2	2015-01-20
Integrated circuit resistor Grant 08921946 -	2014-12-30
Integrated circuit resistor Grant 8,921,946 - Wong , et al. December 30, 2	2014-12-30
Charge/discharge control circuit and charge/discharge method thereof Grant 8,867,297 - Lin October 21, 2	2014-10-21
Integrated method for forming metal gate FinFET devices Grant 8,796,095 - Lin , et al. August 5, 2	2014-08-05
Transistor having notched fin structure and method of making the same Grant 8,759,943 - Tseng , et al. June 24, 2	2014-06-24
Method of making lower parasitic capacitance FinFET Grant 8,697,539 - Huang , et al. April 15, 2	2014-04-15
Hybrid Gate Process for Fabricating FinFET Device App 20140061817 - Gan; Tian-Choy ; et al.	2014-03-06
Hybrid gate process for fabricating finfet device Grant 8,609,495 - Gan , et al. December 17, 2	2013-12-17
Gate structures Grant 8,575,727 - Lim , et al. November 5, 2	2013-11-05
Gate Structures App 20130240979 - Lim; Peng-Soon ; et al.	2013-09-19
Plasma Doping To Reduce Dielectric Loss During Removal Of Dummy Layers In A Gate Structure App 20130228871 - HUANG; Yu-Lien ; et al.	2013-09-05
Integrated Circuit Resistor App 20130119480 - Wong; King-Yuen ; et al.	2013-05-16
Gate structures Grant 8,441,107 - Lim , et al. May 14, 2	2013-05-14
Method Of Making Lower Parasitic Capacitance Finfet App 20130109152 - HUANG; Chih-Hsiang ; et al.	2013-05-02
Plasma doping to reduce dielectric loss during removal of dummy layers in a gate structure Grant 8,431,453 - Huang , et al. April 30, 2	2013-04-30
Lower parasitic capacitance FinFET Grant 8,362,572 - Huang , et al. January 29, 2	2013-01-29
Fabrication Methods Of Integrated Semiconductor Structure App 20120322246 - WANG; Sheng-Hsiung ; et al.	2012-12-20
Gate Structures App 20120319192 - Lim; Peng-Soon ; et al.	2012-12-20
Plasma Doping To Reduce Dielectric Loss During Removal Of Dummy Layers In A Gate Structure App 20120248550 - HUANG; Yu-Lien ; et al.	2012-10-04
Method of fabricating gate structures Grant 8,278,173 - Lim , et al. October 2, 2	2012-10-02
System and method for controlling charging process of an electronic device Grant 8,237,399 - Lin August 7, 2	2012-08-07
Portable electronic device and method for using the same Grant 8,218,282 - Lin July 10, 2	2012-07-10
Transistor Having Notched Fin Structure And Method Of Making The Same App 20120086053 - TSENG; Chih-Hung ; et al.	2012-04-12
INTEGRATED METHOD FOR FORMING METAL GATE FinFET DEVICES App 20120015493 - Lin; Chia-Pin ; et al.	2012-01-19
Gate Structures And Method Of Fabricating Same App 20120001266 - Lim; Peng-Soon ; et al.	2012-01-05
Hybrid Gate Process For Fabricating Finfet Device App 20110248348 - Gan; Tian-Choy ; et al.	2011-10-13
Integrated method for forming high-k metal gate FinFET devices Grant 8,034,677 - Lin , et al. October 11, 2	2011-10-11
Method Of Making A Finfet, And Finfet Formed By The Method App 20110227162 - LIN; Chia-Pin ; et al.	2011-09-22
Dual Epitaxial Process For A Finfet Device App 20110210393 - Chen; Hung-Kai ; et al.	2011-09-01
Integrated Method For Forming High-k Metal Gate Finfet Devices App 20110207279 - LIN; Chia-Pin ; et al.	2011-08-25
Lower Parasitic Capacitance Finfet App 20110193175 - HUANG; Chih-Hsiang ; et al.	2011-08-11
Projection System And Method Thereof App 20110019156 - Chang; Chih-Chung ; et al.	2011-01-27
Portable Electronic Device And Method For Using The Same App 20100329468 - LIN; CHIA-PIN	2010-12-30
System And Method For Controlling Charging Process Of An Electronic Device App 20100253291 - LIN; CHIA-PIN	2010-10-07
Management method for remote digital signage App 20090276491 - Lin; Chia-Pin ; et al.	2009-11-05
Fully-depleted SOI MOSFET device and process for fabricating the same App 20060255405 - Tsui; Bing-Yue ; et al.	2006-11-16
[circuit Connecting Structure And Fabricating Method Thereof] App 20050230711 - Chang, Chin-Chung ; et al.	2005-10-20
Method of laminating copper foil onto a printed circuit board App 20050098262 - Lin, Chia-Pin ; et al.	2005-05-12
Process for forming field emission electrode for manufacturing field emission array Grant 6,739,930 - Cheng , et al. May 25, 2	2004-05-25
Method of fabricating passive device on printed circuit board App 20030113669 - Cheng, Jao-Chin ; et al.	2003-06-19
Method of laminating copper foil onto a printed circuit board App 20030006007 - Lin, Chia-Pin ; et al.	2003-01-09
Process of forming field emission electrode for manufacturing field emission array App 20020102899 - Cheng, Huang-Chung ; et al.	2002-08-01