loadpatents
name:-0.04754114151001
name:-0.0449059009552
name:-0.027153968811035
Lim; Seow Fong Patent Filings

Lim; Seow Fong

Patent Applications and Registrations

Patent applications and USPTO patent grants for Lim; Seow Fong.The latest application filed is for "two-bit memory cell and circuit structure calculated in memory thereof".

Company Profile
25.41.35
  • Lim; Seow Fong - Fremont CA
  • Lim; Seow Fong - San Jose CA
  • Lim; Seow Fong - Nanjing CN
  • LIM; Seow Fong - Nanjing JS
  • LIM; Seow-Fong - Taichung City TW
  • Lim; Seow-Fong - Taichung TW
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Local bit lines and methods of selecting the same to access memory elements in cross-point arrays
Grant 11,398,256 - Siau , et al. July 26, 2
2022-07-26
Memory device and multi physical cells error correction method thereof
Grant 11,314,588 - Lien , et al. April 26, 2
2022-04-26
Two-bit memory cell and circuit structure calculated in memory thereof
Grant 11,270,764 - Cong , et al. March 8, 2
2022-03-08
Two-Bit Memory Cell and Circuit Structure Calculated in Memory Thereof
App 20220005525 - CONG; Wei ;   et al.
2022-01-06
Write Method For Resistive Memory
App 20210286562 - WANG; Ping-Kun ;   et al.
2021-09-16
Memory apparatus and data accessing method thereof
Grant 11,088,711 - Lien , et al. August 10, 2
2021-08-10
Circuits and techniques to compensate memory access signals for variations of parameters in multiple layers of memory
Grant 11,069,386 - Chevallier , et al. July 20, 2
2021-07-20
Resistive memory
Grant 11,055,021 - Wang , et al. July 6, 2
2021-07-06
Memory storage apparatus with dynamic data repair mechanism and method of dynamic data repair thereof
Grant 11,010,245 - Lien , et al. May 18, 2
2021-05-18
Memory Device And Multi Physical Cells Error Correction Method Thereof
App 20210141689 - Lien; Chuen-Der ;   et al.
2021-05-13
Resistive memory apparatus and method for writing data thereof
Grant 10,937,495 - Chao , et al. March 2, 2
2021-03-02
Memory Apparatus And Data Accessing Method Thereof
App 20210013906 - Lien; Chuen-Der ;   et al.
2021-01-14
Resistive Memory Apparatus And Method For Writing Data Thereof
App 20210005255 - Chao; He-Hsuan ;   et al.
2021-01-07
Memory apparatus having hierarchical error correction code layer
Grant 10,853,167 - Lien , et al. December 1, 2
2020-12-01
Circuits And Techniques To Compensate Memory Access Signals For Variations Of Parameters In Multiple Layers Of Memory
App 20200335144 - Chevallier; Christophe ;   et al.
2020-10-22
RRAM with plurality of 1TnR structures
Grant 10,811,092 - Lin , et al. October 20, 2
2020-10-20
Local Bit Lines And Methods Of Selecting The Same To Access Memory Elements In Cross-point Arrays
App 20200302973 - Siau; Chang Hua ;   et al.
2020-09-24
Memory Apparatus Having Hierarchical Error Correction Code Layer
App 20200241957 - Lien; Chuen-Der ;   et al.
2020-07-30
Non-volatile memory and reset method thereof
Grant 10,714,157 - Lin , et al.
2020-07-14
Physical unclonable function code generation apparatus and method thereof
Grant 10,700,878 - Ryu , et al.
2020-06-30
Circuits and techniques to compensate memory access signals for variations of parameters in multiple layers of memory
Grant 10,650,870 - Chevallier , et al.
2020-05-12
Local bit lines and methods of selecting the same to access memory elements in cross-point arrays
Grant 10,622,028 - Siau , et al.
2020-04-14
Memory Storage Apparatus With Dynamic Data Repair Mechanism And Method Of Dynamic Data Repair Thereof
App 20190391874 - Lien; Chuen-Der ;   et al.
2019-12-26
Encoding method and memory storage apparatus using the same
Grant 10,514,980 - Lien , et al. Dec
2019-12-24
Resistive Memory
App 20190369920 - WANG; Ping-Kun ;   et al.
2019-12-05
Operating method of resistive memory element
Grant 10,490,272 - Lin , et al. Nov
2019-11-26
Physical unclonable function code generating method and providing apparatus thereof
Grant 10,439,829 - Lin , et al. O
2019-10-08
Method Of Implementing Error Correction Code Used By Memory Storage Apparatus And Memory Storage Apparatus Using The Same
App 20190294497 - Lien; Chuen-Der ;   et al.
2019-09-26
Encoding Method And Memory Storage Apparatus Using The Same
App 20190294496 - Lien; Chuen-Der ;   et al.
2019-09-26
NVFF monotonic counter and method of implementing same
Grant 10,419,004 - Lim , et al. Sept
2019-09-17
Circuits And Techniques To Compensate Memory Access Signals For Variations Of Parameters In Multiple Layers Of Memory
App 20190252011 - Chevallier; Christophe ;   et al.
2019-08-15
Encoding method and a memory storage apparatus using the same
Grant 10,372,535 - Lien , et al.
2019-08-06
Non-volatile memory and erase controlling method thereof
Grant 10,261,692 - Lim
2019-04-16
Programmable array logic circuit and operating method thereof
Grant 10,262,732 - Lim , et al.
2019-04-16
Operating Method Of Resistive Memory Element
App 20190088321 - Lin; Lih-Wei ;   et al.
2019-03-21
Encoding Method And A Memory Storage Apparatus Using The Same
App 20190065307 - Lien; Chuen-Der ;   et al.
2019-02-28
Memory device and control method thereof
Grant 10,216,570 - Hung , et al. Feb
2019-02-26
Circuits and techniques to compensate memory access signals for variations of parameters in multiple layers of memory
Grant 10,210,917 - Chevallier , et al. Feb
2019-02-19
Programmable Array Logic Circuit And Operating Method Thereof
App 20190043575 - Lim; Seow Fong ;   et al.
2019-02-07
Local Bit Lines And Methods Of Selecting The Same To Access Memory Elements In Cross-point Arrays
App 20180342268 - Siau; Chang Hua ;   et al.
2018-11-29
Nvff Monotonic Counter And Method Of Implementing Same
App 20180309453 - LIM; Seow Fong ;   et al.
2018-10-25
Circuits And Techniques To Compensate Memory Access Signals For Variations Of Parameters In Multiple Layers Of Memory
App 20180226110 - Chevallier; Christophe ;   et al.
2018-08-09
Memory Device And Control Method Thereof
App 20180217893 - HUNG; Hsi-Hsien ;   et al.
2018-08-02
Non-volatile semiconductor memory device
Grant 10,032,512 - Senoo , et al. July 24, 2
2018-07-24
Local bit lines and methods of selecting the same to access memory elements in cross-point arrays
Grant 10,002,646 - Siau , et al. June 19, 2
2018-06-19
Circuits and techniques to compensate memory access signals for variations of parameters in multiple layers of memory
Grant 9,870,809 - Chevallier , et al. January 16, 2
2018-01-16
Non-volatile Semiconductor Memory Device
App 20180012655 - Senoo; Makoto ;   et al.
2018-01-11
Apparatus for providing adjustable reference voltage for sensing read-out data for memory
Grant 9,859,000 - Lin , et al. January 2, 2
2018-01-02
Data Sensing Apparatus
App 20170365336 - Lin; Chi-Shun ;   et al.
2017-12-21
Resistive random access memory apparatus with forward and reverse reading modes
Grant 9,576,652 - Lim , et al. February 21, 2
2017-02-21
Circuits And Techniques To Compensate Memory Access Signals For Variations Of Parameters In Multiple Layers Of Memory
App 20160379692 - Chevallier; Christophe ;   et al.
2016-12-29
Circuits and techniques to compensate memory access signals for variations of parameters in multiple layers of memory
Grant 9,384,806 - Chevallier , et al. July 5, 2
2016-07-05
Circuits And Techniques To Compensate Memory Access Signals For Variations Of Parameters In Multiple Layers Of Memory
App 20150364169 - Chevallier; Christophe ;   et al.
2015-12-17
Circuits and techniques to compensate memory access signals for variations of parameters in multiple layers of memory
Grant 9,129,668 - Chevallier , et al. September 8, 2
2015-09-08
Local Bit Lines And Methods Of Selecting The Same To Access Memory Elements In Cross-point Arrays
App 20150132917 - Siau; Chang Hua ;   et al.
2015-05-14
Circuits And Techniques To Compensate Memory Access Signals For Variations Of Parameters In Multiple Layers Of Memory
App 20150055425 - Chevallier; Christophe ;   et al.
2015-02-26
Local bit lines and methods of selecting the same to access memory elements in cross-point arrays
Grant 8,897,050 - Siau , et al. November 25, 2
2014-11-25
Circuits and techniques to compensate memory access signals for variations of parameters in multiple layers of memory
Grant 8,854,881 - Chevallier , et al. October 7, 2
2014-10-07
Circuits and techniques to compensate data signals for variations of parameters affecting memory cells in cross point arrays
Grant 8,705,260 - Chevallier , et al. April 22, 2
2014-04-22
Reference Cell Circuit And Method Of Producing A Reference Current
App 20140071766 - LIN; Chi-Shun ;   et al.
2014-03-13
Reference cell circuit and method of producing a reference current
Grant 8,665,651 - Lin , et al. March 4, 2
2014-03-04
Circuits And Techniques To Compensate Memory Access Signals For Variations Of Parameters In Multiple Layers Of Memory
App 20130229856 - Chevallier; Christophe ;   et al.
2013-09-05
Circuits And Techniques To Compensate Data Signals For Variations Of Parameters Affecting Memory Cells In Cross-Point Arrays
App 20130215667 - Chevallier; Christophe ;   et al.
2013-08-22
Circuits and techniques to compensate memory access signals for variations of parameters in multiple layers of memory
Grant 8,427,868 - Chevallier , et al. April 23, 2
2013-04-23
Circuits and techniques to compensate data signals for variations of parameters affecting memory cells in cross-point arrays
Grant 8,363,443 - Chevallier , et al. January 29, 2
2013-01-29
Local Bit Lines And Methods Of Selecting The Same To Access Memory Elements In Cross-point Arrays
App 20120307542 - Siau; Chang Hua ;   et al.
2012-12-06
Local bit lines and methods of selecting the same to access memory elements in cross-point arrays
Grant 8,270,193 - Siau , et al. September 18, 2
2012-09-18
Local bit lines and methods of selecting the same to access memory elements in cross-point arrays
App 20110188281 - Siau; Chang Hua ;   et al.
2011-08-04
Circuits and techniques to compensate memory access signals for variations of parameters in multiple layers of memory
App 20110188284 - Chevallier; Christophe J. ;   et al.
2011-08-04
Circuits and techniques to compensate data signals for variations of parameters affecting memory cells in cross-point arrays
App 20110188283 - Chevallier; Christophe J. ;   et al.
2011-08-04

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