LIM; Chul-Hyun
Patent Applications and Registrations
Patent applications and USPTO patent grants for LIM; Chul-Hyun.The latest application filed is for "vertical edge blocking (veb) technique for increasing patterning process margin".
- LIM; Chul-Hyun - Albuquerque NM
- Lim; Chul-Hyun - Portland OR
| Patent | Date |
|---|---|
| Vertical Edge Blocking (veb) Technique For Increasing Patterning Process Margin App 20200388530 - GULER; Leonard P. ; et al. | 2020-12-10 |
| Internal spacers for nanowire transistors and method of fabrication thereof Grant 9,935,205 - Kim , et al. April 3, 2 | 2018-04-03 |
| Internal Spacers For Nanowire Transistors And Method Of Fabrication Thereof App 20170047452 - Kim; Seiyon ; et al. | 2017-02-16 |
| Internal spacers for nanowire transistors and method of fabrication thereof Grant 9,508,796 - Kim , et al. November 29, 2 | 2016-11-29 |
| Internal Spacers For Nanowire Transistors And Method Of Fabrication Thereof App 20160211322 - KIM; Seiyon ; et al. | 2016-07-21 |
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