loadpatents
name:-0.041932821273804
name:-0.013518810272217
name:-0.025861978530884
Lilak; Aaron Patent Filings

Lilak; Aaron

Patent Applications and Registrations

Patent applications and USPTO patent grants for Lilak; Aaron.The latest application filed is for "non-silicon n-type and p-type stacked transistors for integrated circuit devices".

Company Profile
29.13.43
  • Lilak; Aaron - Beaverton OR
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Non-silicon N-type And P-type Stacked Transistors For Integrated Circuit Devices
App 20220310605 - Dewey; Gilbert ;   et al.
2022-09-29
Transistors stacked on front-end p-type transistors
Grant 11,437,405 - Dewey , et al. September 6, 2
2022-09-06
Double gated thin film transistors
Grant 11,411,119 - Lilak , et al. August 9, 2
2022-08-09
Vertically stacked finFETs and shared gate patterning
Grant 11,404,319 - Lilak , et al. August 2, 2
2022-08-02
Non-silicon N-Type and P-Type stacked transistors for integrated circuit devices
Grant 11,387,238 - Dewey , et al. July 12, 2
2022-07-12
Stacked transistor architecture including nanowire or nanoribbon thin film transistors
Grant 11,380,684 - Dewey , et al. July 5, 2
2022-07-05
Stacked nanowire transistor structure with different channel geometries for stress
Grant 11,367,722 - Lilak , et al. June 21, 2
2022-06-21
Stacked self-aligned transistors with single workfunction metal
Grant 11,362,189 - Lilak , et al. June 14, 2
2022-06-14
Stacked transistor structures with asymmetrical terminal interconnects
Grant 11,342,227 - Lilak , et al. May 24, 2
2022-05-24
Thin Film Transistors Having U-shaped Features
App 20220149209 - DEWEY; Gilbert ;   et al.
2022-05-12
Isolation Walls For Vertically Stacked Transistor Structures
App 20220115372 - LILAK; Aaron ;   et al.
2022-04-14
Thin film transistors having U-shaped features
Grant 11,264,512 - Dewey , et al. March 1, 2
2022-03-01
Isolation walls for vertically stacked transistor structures
Grant 11,239,232 - Lilak , et al. February 1, 2
2022-02-01
Double-sided Integrated Circuit Transistor Structures With Depopulated Bottom Channel Regions
App 20210398977 - Mishra; Varun ;   et al.
2021-12-23
Stacked Transistor Structures With Asymmetrical Terminal Interconnects
App 20210305098 - Lilak; Aaron ;   et al.
2021-09-30
Multiple Strain States In Epitaxial Transistor Channel Through The Incorporation Of Stress-relief Defects Within An Underlying Seed Material
App 20210257492 - Lilak; Aaron ;   et al.
2021-08-19
Method, device and system to provide capacitance for a dynamic random access memory cell
Grant 11,049,861 - Lilak , et al. June 29, 2
2021-06-29
Removal Of A Bottom-most Nanowire From A Nanowire Device Stack
App 20210159312 - Lilak; Aaron ;   et al.
2021-05-27
Removal of a bottom-most nanowire from a nanowire device stack
Grant 10,892,326 - Lilak , et al. January 12, 2
2021-01-12
Forming An Oxide Volume Within A Fin
App 20200411365 - HUANG; Cheng-Ying ;   et al.
2020-12-31
Sidewall Interconnect Metallization Structures For Integrated Circuit Devices
App 20200411433 - Lilak; Aaron ;   et al.
2020-12-31
Stacked Source-drain-gate Connection And Process For Forming Such
App 20200411651 - MANNEBACH; Ehren ;   et al.
2020-12-31
Devices With Air Gapping Between Stacked Transistors And Process For Providing Such
App 20200411639 - MANNEBACH; Ehren ;   et al.
2020-12-31
Stacked Trigate Transistors With Dielectric Isolation And Process For Forming Such
App 20200411511 - RACHMADY; Willy ;   et al.
2020-12-31
Amorphization And Regrowth Of Source-drain Regions From The Bottom-side Of A Semiconductor Assembly
App 20200411644 - LILAK; Aaron ;   et al.
2020-12-31
Device With Air-gaps To Reduce Coupling Capacitance And Process For Forming Such
App 20200411526 - SHARMA; Abhishek ;   et al.
2020-12-31
Sideways Vias In Isolation Areas To Contact Interior Layers In Stacked Devices
App 20200411430 - MANNEBACH; Ehren ;   et al.
2020-12-31
Device Including Air Gapping Of Gate Spacers And Other Dielectrics And Process For Providing Such
App 20200411660 - MANNEBACH; Ehren ;   et al.
2020-12-31
Epitaxial Layer With Substantially Parallel Sides
App 20200411315 - HUANG; Cheng-Ying ;   et al.
2020-12-31
Inverted staircase contact for density improvement to 3D stacked devices
Grant 10,861,870 - Lilak , et al. December 8, 2
2020-12-08
Non-silicon N-type And P-type Stacked Transistors For Integrated Circuit Devices
App 20200335501 - Dewey; Gilbert ;   et al.
2020-10-22
Capacitance Reduction For Semiconductor Devices Based On Wafer Bonding
App 20200303238 - MANNEBACH; Ehren ;   et al.
2020-09-24
Stress Compensation For Wafer To Wafer Bonding
App 20200303191 - JAHAGIRDAR; Anant ;   et al.
2020-09-24
3d Floating-gate Multiple-input Device
App 20200258894 - A1
2020-08-13
Vertically Stacked Finfets & Shared Gate Patterning
App 20200235013 - Lilak; Aaron ;   et al.
2020-07-23
3d 1t1c Stacked Dram Structure And Method To Fabricate
App 20200227416 - LILAK; Aaron ;   et al.
2020-07-16
Gate-all-around Integrated Circuit Structures Having Depopulated Channel Structures Using Multiple Bottom-up Oxidation Approache
App 20200219970 - Mannebach; Ehren ;   et al.
2020-07-09
Gate-all-around Integrated Circuit Structures Having Depopulated Channel Structures Using Bottom-up Oxidation Approach
App 20200219979 - RACHMADY; Willy ;   et al.
2020-07-09
Self-aligned Stacked Ge/si Cmos Transistor Structure
App 20200212038 - RACHMADY; Willy ;   et al.
2020-07-02
Three Dimensional Integrated Circuits With Stacked Transistors
App 20200211905 - HUANG; Cheng-Ying ;   et al.
2020-07-02
Vertical Memory Cells
App 20200194435 - LILAK; Aaron ;   et al.
2020-06-18
Stacked Self-aligned Transistors With Single Workfunction Metal
App 20200105891 - LILAK; Aaron ;   et al.
2020-04-02
Stacked Transistor Architecture Including Nanowire Or Nanoribbon Thin Film Transistors
App 20200105751 - Dewey; Gilbert ;   et al.
2020-04-02
Vertically Stacked Cmos With Upfront M0 Interconnect
App 20200098921 - RACHMADY; Willy ;   et al.
2020-03-26
Stacked Nanowire Transistor Structure With Different Channel Geometries For Stress
App 20200098756 - Lilak; Aaron ;   et al.
2020-03-26
Double Gated Thin Film Transistors
App 20200006573 - LILAK; Aaron ;   et al.
2020-01-02
Transistors Stacked On Front-end P-type Transistors
App 20200006388 - DEWEY; Gilbert ;   et al.
2020-01-02
Thin Film Transistors Having U-shaped Features
App 20200006575 - DEWEY; Gilbert ;   et al.
2020-01-02
Isolation Walls For Vertically Stacked Transistor Structures
App 20190393214 - LILAK; Aaron ;   et al.
2019-12-26
Stacked Thin Film Transistors
App 20190393249 - LILAK; Aaron ;   et al.
2019-12-26
Removal Of A Bottom-most Nanowire From A Nanowire Device Stack
App 20190333990 - Lilak; Aaron ;   et al.
2019-10-31
Inverted Staircase Contact For Density Improvement To 3d Stacked Devices
App 20190189635 - Lilak; Aaron ;   et al.
2019-06-20
Method, Device And System To Provide Capacitance For A Dynamic Random Access Memory Cell
App 20180219012 - LILAK; Aaron ;   et al.
2018-08-02

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