Lii; Yeong-Jyh T.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Lii; Yeong-Jyh T..The latest application filed is for "semiconductor device having a multiple thickness interconnect".

Company Profile

0.9.6

Lii; Yeong-Jyh T. - Austin TX
Lii; Yeong-Jyh T. - Plano TX
Lii; Yeong-Jyh T. - Peekskill NY

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Semiconductor device having a multiple thickness interconnect Grant 7,176,574 - Yu , et al. February 13, 2	2007-02-13
Inverted isolation formed with spacers Grant 6,891,229 - Franke , et al. May 10, 2	2005-05-10
Semiconductor device having a multiple thickness interconnect App 20050035459 - Yu, Kathleen C. ; et al.	2005-02-17
Method for forming a passivation layer for air gap formation Grant 6,838,354 - Goldberg , et al. January 4, 2	2005-01-04
Method for forming a semiconductor interconnect with multiple thickness Grant 6,815,820 - Yu , et al. November 9, 2	2004-11-09
Inverted isolation formed with spacers App 20040217437 - Franke, Andrea ; et al.	2004-11-04
Method and structure for low-k dielectric constant applications Grant 6,774,053 - Ryan , et al. August 10, 2	2004-08-10
Method for forming a passivation layer for air gap formation and structure thereof App 20040119134 - Goldberg, Cindy K. ; et al.	2004-06-24
Method for forming a semiconductor device structure in a semiconductor layer Grant 6,689,676 - Pham , et al. February 10, 2	2004-02-10
Method For Forming A Semiconductor Device Structure In A Semiconductoe Layer App 20040018681 - Pham, Daniel Thanh-Khac ; et al.	2004-01-29
Multiple thickness semiconductor interconnect and method therefor App 20030209779 - Yu, Kathleen C. ; et al.	2003-11-13
Method for forming a semiconductor device having elevated source and drain regions App 20020171107 - Cheng, Baohong ; et al.	2002-11-21
Method of preventing two neighboring contacts from a short-circuit caused by a void between them and device having the same Grant 6,369,430 - Adetutu , et al. April 9, 2	2002-04-09
Method for forming a semiconductor device with an opening in a dielectric layer Grant 6,362,071 - Nguyen , et al. March 26, 2	2002-03-26
Process for fabricating a semiconductor structure having sidewalls Grant 5,378,312 - Gifford , et al. January 3, 1	1995-01-03

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