Lien; Chen-Hsin
Patent Applications and Registrations
Patent applications and USPTO patent grants for Lien; Chen-Hsin.The latest application filed is for "method for fabricating semiconductor device to lower source/drain sheet resistance".
- Lien; Chen-Hsin - Hsinchu TW
| Patent | Date |
|---|---|
| Method for fabricating semiconductor device to lower source/drain sheet resistance Grant 7,465,664 - Ho , et al. December 16, 2 | 2008-12-16 |
| Method for fabricating semiconductor device to lower source/drain sheet resistance App 20070155074 - Ho; Ching-Yuan ; et al. | 2007-07-05 |
| Early triggered ESD MOSFET protection circuit and method thereof Grant 6,958,896 - Lin , et al. October 25, 2 | 2005-10-25 |
| Early triggered ESD MOSFET protection circuit and method thereof App 20030214768 - Lin, Shi-Tron ; et al. | 2003-11-20 |
| Semiconductor device having reduced leakage and method of operating the same App 20020181291 - Chen, Wei-Fan ; et al. | 2002-12-05 |
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